Debug Automation from Pre-Silicon to Post-Silicon
暫譯: 從前矽到後矽的除錯自動化
Mehdi Dehbashi, Görschwin Fey
- 出版商: Springer
- 出版日期: 2014-10-09
- 售價: $2,420
- 貴賓價: 9.5 折 $2,299
- 語言: 英文
- 頁數: 171
- 裝訂: Hardcover
- ISBN: 3319093088
- ISBN-13: 9783319093086
海外代購書籍(需單獨結帳)
商品描述
This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers.
- Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages;
- Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level;
- Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
商品描述(中文翻譯)
這本書描述了自動化除錯方法,針對在硬體系統不同抽象層次中出現的錯誤和故障。作者採用基於交易的除錯方法,針對交易層級的系統,驗證交易之間的正確關係。針對設計錯誤的自動化除錯方法能夠在電路的 RTL(寄存器傳輸層)和閘級中找到潛在的故障候選者。書中展示了邏輯錯誤和同步錯誤的除錯技術,使讀者能夠定位最難以發現的錯誤。針對電氣故障(延遲故障)的除錯自動化能夠在電路的閘級中找到潛在的失效速度路徑。所描述的各種除錯方法實現了高診斷準確性,並減少了除錯時間,縮短了 IC 開發週期,提升了設計師的生產力。
- 描述了一個統一的除錯自動化框架,適用於前矽和後矽階段;
- 提供了針對硬體系統在不同抽象層次(即晶片、閘級、RTL 和交易層級)的除錯自動化方法;
- 包含設計錯誤和電氣故障的除錯自動化技術,以及用於除錯基於 NoC(網路晶片)的多處理器 SoC 的基礎設施。