Debugging Systems-on-Chip: Communication-centric and Abstraction-based Techniques (Embedded Systems)
暫譯: 系統單晶片除錯:以通信為中心的抽象技術(嵌入式系統)
Bart Vermeulen, Kees Goossens
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商品描述
This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly. Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors. The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug flow to be used during the design of an SOC, and customizable off-chip debugger software. Coverage includes an evaluation of the efficiency and effectiveness of the CSAR approach and its supporting infrastructure, using six industrial SOCs and an illustrative, example SOC model. The authors also quantify the hardware cost and design effort to support their approach.
商品描述(中文翻譯)
本書描述了一種方法及其支援基礎設施,以促進對系統單晶片(System-on-Chip, SOC)矽實現的除錯,從而使相關產品能更快地推向市場。讀者將逐步學習現代矽SOC實現的除錯關鍵需求、九個使除錯任務變得複雜的因素,以及一種新的除錯方法,該方法針對這些需求和複雜因素進行了處理。作者詳細討論了其新穎的以通信為中心、基於掃描、基於抽象、基於運行/停止(CSAR)的除錯方法,展示了它如何幫助滿足除錯需求並解決之前識別的九個使矽實現SOC除錯變得複雜的因素。作者還推導出支援使用CSAR除錯方法對SOC的矽實現進行除錯的基礎設施需求。這個除錯基礎設施包括一個通用的片上除錯架構、一個可配置的自動化設計以便於除錯的流程,該流程在SOC設計期間使用,以及可自定義的片外除錯器軟體。內容涵蓋了使用六個工業SOC和一個示例SOC模型來評估CSAR方法及其支援基礎設施的效率和有效性。作者還量化了支援其方法所需的硬體成本和設計努力。