Transaction-Level Modeling with Systemc: Tlm Concepts and Applications for Embedded Systems
暫譯: 使用 SystemC 的交易層級建模:嵌入式系統的 TLM 概念與應用
Frank Ghenassia
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商品描述
Description
Currently employed at STMicroelectronics, Transactional-Level Modeling (TLM) puts forward a novel SoC design methodology beyond RTL with measured improvements of productivity and first time silicon success.
The SystemC consortium has published the official TLM development kit in May 2005 to standardize this modeling technique. The library is flexible enough to model components and systems at many different levels of abstractions: from cycle-accurate to untimed models, and from bit-true behavior to floating-point algorithms. However, careful selection of the abstraction level and associated methodology is crucial to ensure practical gains for design teams.
Transaction-Level Modeling with SystemC presents the formalized abstraction and related methodology defined at STMicroelectronics, and covers all major topics related to the Electronic System-Level (ESL) industry:
- TLM modeling concepts
- Early embedded software development based on SoC virtual prototypes
- Functional verification using reference models
- Architecture analysis with mixed TLM and cycle accurate platforms
- Unifying TLM and RTL with platform automation toolsComplementary to the book, open source code to put this approach into practice is available on several Internet sites as indicated in the first chapter.
Foreword
Author: P MagarshackChapter 1: TLM: An Overview and Brief History
Authors: F.Ghenassia and A.ClouardChapter 2: Transaction Level Modeling – An Abstraction beyond RTL
Authors: L.Maillet-Contoz and F.GhenassiaChapter 3: TLM Modeling Techniques based on SystemC
Authors: L.Maillet-Contoz and J.-P.StrassenChapter 4: Embedded Software Development through the TLM Approach
Authors: E.PaireChapter 5: Functional Verification From the TLM Perspective
Authors: T.Bultiaux, S.Guenot, S.Hustin, A.Blampey, J.Bulone and M.MoyChapter 6: Architecture Analysis and System Debugging - a Transactional Debugging
Authors: A. Perrin and G.PoivreChapter 7: Design Automation - Integrating TLM in SoC Design Flow
Authors: C.Amerijckx, S.Guenot, A.Kerkeni and S.Hustin
商品描述(中文翻譯)
**描述**
目前在STMicroelectronics工作,交易層級建模(Transactional-Level Modeling, TLM)提出了一種超越RTL的嶄新SoC設計方法論,並在生產力和首次矽片成功率上有顯著改善。
SystemC聯盟於2005年5月發布了官方的TLM開發工具包,以標準化這種建模技術。該庫足夠靈活,可以在多個不同的抽象層次上建模組件和系統:從週期精確的模型到無時間模型,從位真行為到浮點算法。然而,仔細選擇抽象層次和相關方法論對於確保設計團隊的實際收益至關重要。
**使用SystemC的交易層級建模**介紹了在STMicroelectronics定義的正式化抽象和相關方法論,並涵蓋了與電子系統級(Electronic System-Level, ESL)行業相關的所有主要主題:
- TLM建模概念
- 基於SoC虛擬原型的早期嵌入式軟體開發
- 使用參考模型的功能驗證
- 混合TLM和週期精確平台的架構分析
- 使用平台自動化工具統一TLM和RTL
作為本書的補充,實現此方法的開源代碼可在第一章中提到的幾個互聯網網站上獲得。
**目錄**
**前言**
作者:P Magarshack
**第1章:TLM:概述與簡史**
作者:F.Ghenassia 和 A.Clouard
**第2章:交易層級建模 - 超越RTL的抽象**
作者:L.Maillet-Contoz 和 F.Ghenassia
**第3章:基於SystemC的TLM建模技術**
作者:L.Maillet-Contoz 和 J.-P.Strassen
**第4章:通過TLM方法的嵌入式軟體開發**
作者:E.Paire
**第5章:從TLM角度的功能驗證**
作者:T.Bultiaux, S.Guenot, S.Hustin, A.Blampey, J.Bulone 和 M.Moy
**第6章:架構分析與系統調試 - 交易調試**
作者:A. Perrin 和 G.Poivre
**第7章:設計自動化 - 將TLM整合到SoC設計流程中**
作者:C.Amerijckx, S.Guenot, A.Kerkeni 和 S.Hustin