System Level ESD Co-Design
暫譯: 系統級靜電放電共同設計
Charvaka Duvvury, Harald Gossner
- 出版商: Wiley
- 出版日期: 2015-09-08
- 售價: $4,200
- 貴賓價: 9.5 折 $3,990
- 語言: 英文
- 頁數: 424
- 裝訂: Hardcover
- ISBN: 1118861906
- ISBN-13: 9781118861905
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相關分類:
Design Pattern 、電子學 Eletronics
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商品描述
An effective and cost efficient protection of electronic system against ESD stress pulses specified by IEC 61000-4-2 is paramount for any system design. This pioneering book presents the collective knowledge of system designers and system testing experts and state-of-the-art techniques for achieving efficient system-level ESD protection, with minimum impact on the system performance. All categories of system failures ranging from ‘hard’ to ‘soft’ types are considered to review simulation and tool applications that can be used.
The principal focus of System Level ESD Co-Design is defining and establishing the importance of co-design efforts from both IC supplier and system builder perspectives. ESD designers often face challenges in meeting customers' system-level ESD requirements and, therefore, a clear understanding of the techniques presented here will facilitate effective simulation approaches leading to better solutions without compromising system performance.
With contributions from Robert Ashton, Jeffrey Dunnihoo, Micheal Hopkins, Pratik Maheshwari, David Pomerenke, Wolfgang Reinprecht, and Matti Usumaki, readers benefit from hands-on experience and in-depth knowledge in topics ranging from ESD design and the physics of system ESD phenomena to tools and techniques to address soft failures and strategies to design ESD-robust systems that include mobile and automotive applications.
The first dedicated resource to system-level ESD co-design, this is an essential reference for industry ESD designers, system builders, IC suppliers and customers and also Original Equipment Manufacturers (OEMs).
Key features:
• Clarifies the concept of system level ESD protection.
• Introduces a co-design approach for ESD robust systems.
• Details soft and hard ESD fail mechanisms.
• Detailed protection strategies for both mobile and automotive applications.
• Explains simulation tools and methodology for system level ESD co-design and overviews available test methods and standards.
• Highlights economic benefits of system ESD co-design.
商品描述(中文翻譯)
有效且具成本效益的電子系統抗靜電放電(ESD)脈衝保護,根據 IEC 61000-4-2 的規範,對於任何系統設計都是至關重要的。本書匯集了系統設計師和系統測試專家的集體知識,以及實現高效系統級 ESD 保護的先進技術,並對系統性能的影響降至最低。考慮到所有類別的系統故障,從「硬故障」到「軟故障」,本書回顧了可用的模擬和工具應用。
《系統級 ESD 協同設計》的主要重點在於定義和建立 IC 供應商和系統建構者雙方協同設計努力的重要性。ESD 設計師經常面臨滿足客戶系統級 ESD 要求的挑戰,因此,對本書所介紹技術的清晰理解將促進有效的模擬方法,從而導致更好的解決方案,而不會妥協系統性能。
本書由 Robert Ashton、Jeffrey Dunnihoo、Micheal Hopkins、Pratik Maheshwari、David Pomerenke、Wolfgang Reinprecht 和 Matti Usumaki 共同撰寫,讀者將受益於從 ESD 設計和系統 ESD 現象的物理學到解決軟故障的工具和技術,以及設計抗 ESD 系統的策略,這些系統包括移動和汽車應用的實踐經驗和深入知識。
作為首部專門針對系統級 ESD 協同設計的資源,這是行業 ESD 設計師、系統建構者、IC 供應商及客戶以及原始設備製造商(OEM)的重要參考資料。
主要特點:
• 澄清系統級 ESD 保護的概念。
• 介紹抗 ESD 系統的協同設計方法。
• 詳細說明軟故障和硬故障的 ESD 失效機制。
• 提供移動和汽車應用的詳細保護策略。
• 解釋系統級 ESD 協同設計的模擬工具和方法論,並概述可用的測試方法和標準。
• 突出系統 ESD 協同設計的經濟效益。