System Level ESD Protection
暫譯: 系統級靜電放電保護

Vashchenko, Vladislav, Scholz, Mirko

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商品描述

This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations.

商品描述(中文翻譯)

本書探討與系統級靜電放電(ESD)保護相關的類比集成電路和系統設計的關鍵方面。對於任何開發系統單晶片(SoC)和系統封裝(SoP)並整合系統級ESD保護的人來說,這是一本無價的參考書。本書專注於具有嵌入式、片上系統級保護的半導體集成電路(IC)元件的設計以及IC系統的共同設計。讀者將能夠將系統級ESD保護解決方案帶入集成電路的層面,從而減少或完全消除在印刷電路板(PCB)上對額外離散元件的需求,並滿足系統級ESD要求。作者採取系統化的方法,基於IC系統ESD保護的共同設計。提供了可用的IC級ESD測試方法的詳細描述,並討論了IC級與系統級ESD測試方法之間的相關性。IC級ESD保護設計通過代表性的案例研究進行演示,這些案例研究通過各種數值模擬和ESD測試進行分析。IC系統ESD共同設計的整體方法論以逐步程序的形式呈現,涉及ESD測試和數值模擬。

作者簡介

Dr. Vladislav Vashchenko is Director of ESD group at Maxim Integrated Corp responsible for major ESD development aspects across the entire $2.4B enterprise. During previous decade he was leading the ESD group at National Semiconductor Corp. and the decade till then he was a key contributor in reliability department of SRI "Pulsar"(Moscow). He received MS, Engineer-Physicist and "Ph.D. in Physics of Semiconductors" from Moscow Institute of Physics and Technology (1990) and "Doctor of Science in Microelectronics" degree (1997). He is author of over 140 U.S. patents and over 100 papers in the field, co-author of books "Physical Limitation of Semiconductor Devices" (2008) and "ESD Design for Analog Circuits" (2010, ).

Mirko Scholz received the degree "Diplomingenieur (FH)" from the University of Applied Sciences in Zwickau (Germany) in 2005 and the PhD degree in Electrical Engineering from the Vrije Universiteit in Brussels (VUB) in 2013. In April 2005 he joined the imec ESD team as ESD researcher where he authored and coauthored more than 70 publications, tutorials and patents in the field of ESD reliability and ESD testing. Since 2007, he has been a member of the Device Testing Working Groups of the ESDA standards committee where he currently chairs working group 5.6 (Human Metal Model).

作者簡介(中文翻譯)

Dr. Vladislav Vashchenko 是 Maxim Integrated Corp 的 ESD 團隊主任,負責整個 24 億美元企業的主要 ESD 開發方面。在過去的十年中,他領導了 National Semiconductor Corp 的 ESD 團隊,而在此之前的十年,他是 SRI "Pulsar"(莫斯科)可靠性部門的關鍵貢獻者。他於 1990 年從莫斯科物理技術學院獲得工程物理學碩士學位及「半導體物理學博士」學位,並於 1997 年獲得「微電子學博士」學位。他是超過 140 項美國專利的作者,並在該領域發表了超過 100 篇論文,還是書籍《半導體器件的物理限制》(2008)和《類比電路的 ESD 設計》(2010)的合著者。

Mirko Scholz 於 2005 年從德國茨維考應用科技大學獲得「Diplomingenieur (FH)」學位,並於 2013 年在布魯塞爾自由大學(VUB)獲得電機工程博士學位。2005 年 4 月,他加入 imec ESD 團隊,擔任 ESD 研究員,並在 ESD 可靠性和 ESD 測試領域撰寫和共同撰寫了超過 70 篇出版物、教程和專利。自 2007 年以來,他一直是 ESDA 標準委員會的器件測試工作組成員,目前擔任工作組 5.6(人類金屬模型)的主席。

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