Model and Design of Improved Current Mode Logic Gates: Differential and Single-Ended
暫譯: 改進電流模式邏輯閘的模型與設計：差分與單端
Gupta, Kirti, Pandey, Neeta, Gupta, Maneesha
- 出版商: Springer
- 出版日期: 2019-12-02
- 售價: $4,470
- 貴賓價: 9.5 折 $4,247
- 語言: 英文
- 頁數: 171
- 裝訂: Hardcover - also called cloth, retail trade, or trade
- ISBN: 9811509816
- ISBN-13: 9789811509810
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商品描述
This book presents MOSFET-based current mode logic (CML) topologies, which increase the speed, and lower the transistor count, supply voltage and power consumption. The improved topologies modify the conventional PDN, load, and the current source sections of the basic CML gates.
Electronic system implementation involves embedding digital and analog circuits on a single die shifting towards mixed-mode circuit design. The high-resolution, low-power and low-voltage analog circuits are combined with high-frequency complex digital circuits, and the conventional static CMOS logic generates large current spikes during the switching (also referred to as digital switching noise), which degrade the resolution of the sensitive analog circuits via supply line and substrate coupling. This problem is exacerbated further with scaling down of CMOS technology due to higher integration levels and operating frequencies. In the literature, several methods are described to reduce the propagation of the digital switching noise. However, in high-resolution applications, these methods are not sufficient. The conventional CMOS static logic is no longer an effective solution, and therefore an alternative with reduced current spikes or that draws a constant supply current must be selected. The current mode logic (CML) topology, with its unique property of requiring constant supply current, is a promising alternative to the conventional CMOS static logic.
商品描述(中文翻譯)
本書介紹了基於MOSFET的電流模式邏輯（CML）拓撲，這些拓撲能提高速度，並降低晶體管數量、供應電壓和功耗。改進的拓撲修改了基本CML閘的傳統PDN、負載和電流源部分。
電子系統的實現涉及在單一晶片上嵌入數位和類比電路，逐漸轉向混合模式電路設計。高解析度、低功耗和低電壓的類比電路與高頻複雜的數位電路相結合，而傳統的靜態CMOS邏輯在切換過程中會產生大的電流尖峰（也稱為數位切換噪聲），這會通過供電線和基板耦合降低敏感類比電路的解析度。隨著CMOS技術的縮小，因為更高的集成度和操作頻率，這個問題進一步惡化。在文獻中，描述了幾種減少數位切換噪聲傳播的方法。然而，在高解析度應用中，這些方法並不足夠。傳統的CMOS靜態邏輯不再是一個有效的解決方案，因此必須選擇一種減少電流尖峰或能夠穩定供電電流的替代方案。電流模式邏輯（CML）拓撲，由於其需要穩定供電電流的獨特特性，是傳統CMOS靜態邏輯的一個有前景的替代方案。
作者簡介
Dr. Kirti Gupta received B.Tech. in Electronics and Communication Engineering from Indira Gandhi Institute of Technology, Delhi in 2002, M. Tech. in Information Technology from School of Information Technology in 2006. She received her Ph.D. in Electronics and Communication Engineering from Delhi Technological University, in 2016. Since 2002, she is with Bharati Vidyapeeth's College of Engineering, New Delhi and is presently serving as Professor in the same institute. A life member of ISTE, and senior member of IEEE, she has published more than 100 research papers in international, national journals and conferences. Her teaching and research interest is in digital VLSI design.
Dr. Neeta Pandey received her M.E. in Microelectronics from Birla Institute of Technology and Sciences, Pilani in 1991 and Ph.D. from Guru Gobind Singh Indraprastha University, Delhi in 2009. She has served in Central Electronics Engineering Research Institute, Pilani, Indian Institute of Technology, Delhi, Priyadarshini College of Computer Science, Noida and Bharati Vidyapeeth's College of Engineering, Delhi in various capacities. At present, she is a professor in the ECE department, Delhi Technological University. Her teaching and research interests include analog and digital VLSI design.
A life member of ISTE, and senior member of IEEE, USA, she has coauthored over 100 papers in international, national journals of repute and conferences.
Dr. Maneesha Gupta is currently a Professor at the Electronics & Communication Engineering Department of the Netaji Subhas University of Technology, India. She received her B.E. in Electronics & Communication Engineering from the Government Engineering College, Jabalpur in 1981, M.E. in Electronics & Communication Engineering from the same university in 1983, and her PhD. in Electronics Engineering (Analysis, Synthesis & Applications of Switched Capacitor Circuits) from the Indian Institute of Technology, Delhi in 1990.
Her teaching and research interests include switched capacitor circuits and analog signal processing. Dr. Gupta has co-authored over 150 research papers in the above areas in various international/national journals and conferences.
作者簡介(中文翻譯)
基爾提·古普塔博士於2002年在德里印度甘地科技學院獲得電子與通信工程的學士學位，並於2006年在信息技術學院獲得信息技術的碩士學位。她於2016年在德里科技大學獲得電子與通信工程的博士學位。自2002年以來，她一直在新德里的巴哈拉提維迪亞比特工程學院任教，目前擔任該院的教授。她是ISTE的終身會員及IEEE的高級會員，已在國際和國內期刊及會議上發表了超過100篇研究論文。她的教學和研究興趣集中在數位VLSI設計上。
尼塔·潘迪博士於1991年在比爾拉科技與科學學院獲得微電子學的碩士學位，並於2009年在古魯·戈賓德·辛格·印德拉普拉斯塔大學獲得博士學位。她曾在中央電子工程研究所、德里印度理工學院、諾伊達的普里亞達爾希尼計算機科學學院及德里巴哈拉提維迪亞比特工程學院擔任各種職位。目前，她是德里科技大學電子與通信工程系的教授。她的教學和研究興趣包括類比和數位VLSI設計。
作為ISTE的終身會員及美國IEEE的高級會員，她在各類國際和國內知名期刊及會議上共同撰寫了超過100篇論文。
馬尼莎·古普塔博士目前是印度內塔吉·蘇巴斯科技大學電子與通信工程系的教授。她於1981年在賈巴爾普爾政府工程學院獲得電子與通信工程的學士學位，並於1983年在同一所大學獲得電子與通信工程的碩士學位，1990年在德里印度理工學院獲得電子工程（開關電容電路的分析、合成與應用）的博士學位。
她的教學和研究興趣包括開關電容電路和類比信號處理。古普塔博士在上述領域已在各類國際和國內期刊及會議上共同撰寫了超過150篇研究論文。
