Research Infrastructures for Hardware Accelerators
暫譯: 硬體加速器的研究基礎設施

Yakun Sophia Shao, David Brooks

  • 出版商: Morgan & Claypool
  • 出版日期: 2015-11-01
  • 售價: $1,460
  • 貴賓價: 9.5$1,387
  • 語言: 英文
  • 頁數: 100
  • 裝訂: Paperback
  • ISBN: 1627058311
  • ISBN-13: 9781627058315
  • 海外代購書籍(需單獨結帳)

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商品描述

Hardware acceleration in the form of customized datapath and control circuitry tuned to specific applications has gained popularity for its promise to utilize transistors more efficiently. Historically, the computer architecture community has focused on general-purpose processors, and extensive research infrastructure has been developed to support research efforts in this domain. Envisioning future computing systems with a diverse set of general-purpose cores and accelerators, computer architects must add accelerator-related research infrastructures to their toolboxes to explore future heterogeneous systems. This book serves as a primer for the field, as an overview of the vast literature on accelerator architectures and their design flows, and as a resource guidebook for researchers working in related areas.

商品描述(中文翻譯)

硬體加速以定制的數據通路和控制電路形式,針對特定應用進行調整,因其能更有效地利用晶體管而受到廣泛關注。歷史上,計算機架構社群專注於通用處理器,並為支持該領域的研究工作建立了廣泛的研究基礎設施。展望未來的計算系統,擁有多樣化的通用核心和加速器,計算機架構師必須在其工具箱中增加與加速器相關的研究基礎設施,以探索未來的異構系統。本書作為該領域的入門書籍,概述了有關加速器架構及其設計流程的廣泛文獻,並作為從事相關領域研究的研究人員的資源指南。

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