Formal Methods and Models for System Design: A System Level Perspective
暫譯: 系統設計的形式方法與模型：系統層級的觀點

Perhaps nothing characterizes the inherent heterogeneity in embedded sys­ tems than the ability to choose between hardware and software implementations of a given system function. Indeed, most embedded systems at their core repre­ sent a careful division and design of hardware and software parts of the system To do this task effectively, models and methods are necessary functionality. to capture application behavior, needs and system implementation constraints. Formal modeling can be valuable in addressing these tasks. As with most engineering domains, co-design practice defines the state of the it seeks to add new capabilities in system conceptualization, mod­ art, though eling, optimization and implementation. These advances -particularly those related to synthesis and verification tasks -direct1y depend upon formal under­ standing of system behavior and performance measures. Current practice in system modeling relies upon exploiting high-level programming frameworks, such as SystemC, EstereI, to capture design at increasingly higher levels of ab­ straction and attempts to reduce the system implementation task. While raising the abstraction levels for design and verification tasks, to be really useful, these approaches must also provide for reuse, adaptation of the existing intellectual property (IP) blocks.