VHDL By Example
暫譯: VHDL 實例解析
Blaine Readler
- 出版商: Full Arc Press
- 出版日期: 2014-05-14
- 售價: $900
- 貴賓價: 9.5 折 $855
- 語言: 英文
- 頁數: 120
- 裝訂: Paperback
- ISBN: 0983497354
- ISBN-13: 9780983497356
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相關分類:
FPGA、電路學 Electric-circuits
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商品描述
A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the Vhld hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all core features of Vhdl are brought to light. Included in the coverage are state machines, modular design, Fpga-based memories, clock management, specialized I/O, and an introduction to techniques of simulation. The goal is to prepare the reader to design real-world Fpga solutions. All the sample code used in the book is available online. What Strunk and White did for the English language with "The Elements of Style," Vhdl By Example does for Fpga design.
商品描述(中文翻譯)
一本實用的入門書籍,適合已經熟悉數位設計基礎的學生和在職工程師,這本參考書逐步發展對 VHDL 硬體描述語言的實用理解,並使用易於理解的範例。從一個簡單但可行的設計範例開始,逐漸引入語言中越來越複雜的基本概念,直到所有 VHDL 的核心特性都被揭示。內容涵蓋狀態機、模組化設計、基於 FPGA 的記憶體、時鐘管理、專用 I/O,以及模擬技術的介紹。目標是讓讀者能夠設計實際的 FPGA 解決方案。書中使用的所有範例程式碼均可在線獲得。正如 Strunk 和 White 在《The Elements of Style》中對英語所做的,VHDL By Example 也為 FPGA 設計提供了指導。