Essentials of Electronic Testing: for Digital, Memory & Mixed-Signal VLSI Circui (Hardcover)
M. Bushnell, Vishwani Agrawal
- 出版商: Kluwer Academic Publ
- 出版日期: 2000-11-30
- 售價: $1,200
- 貴賓價: 9.8 折 $1,176
- 語言: 英文
- 頁數: 690
- 裝訂: Hardcover
- ISBN: 0792379918
- ISBN-13: 9780792379911
-
相關分類:
VLSI、使用者介面 UI
立即出貨 (庫存=1)
買這商品的人也買了...
-
$1,200$1,176 -
$1,029Fundamentals of Data Structures in C
-
$680$537 -
$2,610$2,480 -
$2,810$2,670 -
$980$774 -
$970Introduction to Algorithms, 2/e
-
$1,150$1,127 -
$600$510 -
$880$695 -
$1,274Computer Architecture: A Quantitative Approach, 3/e(精裝本)
-
$1,029Operating System Concepts, 6/e (Windows XP Update)
-
$860$731 -
$1,860$1,767 -
$780$741 -
$1,127Computer Networks, 4/e
-
$590$466 -
$690$538 -
$650$618 -
$720$569 -
$820$804 -
$750$675 -
$560$504 -
$2,340$2,223 -
$399$339
相關主題
商品描述
Description:
Today's electronic design and test engineers deal with several types of subsystems, namely, digital, memory, and mixed-signal, each requiring different test and design for testability methods. This book provides a careful selection of essential topics on all three types of circuits. The outcome of testing is product quality, which means `meeting the user's needs at a minimum cost.' The book includes test economics and techniques for determining the defect level of VLSI chips. Besides being a textbook for a course on testing, it is a complete testability guide for an engineer working on any kind of electronic device or system or a system-on-a-chip.
The book consists of:Appendices: Cyclic Redundancy Code Theory, Primitive Polynomials, Books on Testing; Bibliography: over 700 entries.
- Part I: Introduction, Test Process and ATE, Test Economics and Product Quality, Fault Modeling;
- Part II: Logic and Fault Simulation, Testability Measures, Combinatorial ATPG, Sequential ATPG, Memory Test, DSP-Based Analog Test, Model-Based Analog Test, Delay Test, IDDQ Test;
- Part III: DFT and Scan Design, BIST, Boundary Scan, Analog Test Bus, System Test and Core-Based Design, Future Testing;
商品描述(中文翻譯)
描述:
今天的電子設計和測試工程師處理多種類型的子系統,包括數字、記憶體和混合信號,每種子系統都需要不同的測試和設計測試性方法。本書精選了這三種電路的重要主題。測試的結果是產品品質,這意味著“以最低成本滿足用戶需求”。本書還包括測試經濟學和確定VLSI晶片缺陷水平的技術。除了作為測試課程的教科書外,它還是一本對任何類型的電子設備、系統或片上系統進行測試的完整指南。
本書包括以下內容:
第一部分:介紹、測試流程和ATE、測試經濟學和產品品質、故障建模;
第二部分:邏輯和故障模擬、測試性度量、組合式ATPG、時序ATPG、記憶體測試、基於DSP的類比測試、基於模型的類比測試、延遲測試、IDDQ測試;
第三部分:DFT和掃描設計、BIST、邊界掃描、類比測試總線、系統測試和基於核心的設計、未來測試;
附錄:循環冗餘檢查碼理論、原始多項式、測試書籍;參考文獻:超過700條目。