Hardware Description Languages: Concepts And Principles
暫譯: 硬體描述語言:概念與原則

Sumit Ghosh

  • 出版商: Wiley
  • 出版日期: 1999-09-24
  • 售價: $4,180
  • 貴賓價: 9.5$3,971
  • 語言: 英文
  • 頁數: 266
  • 裝訂: Hardcover
  • ISBN: 0780347447
  • ISBN-13: 9780780347441
  • 海外代購書籍(需單獨結帳)

相關主題

商品描述

Description:

Electrical Engineering Hardware Description Languages Concepts and Principles A volume in the IEEE Press Series on Microelectronic Systems Stuart K. Tewksbury and Joe E. Brewer, Series Editors Hardware description languages (HDLs) hold the key to future processor designs, but until now no book has offered a clear analysis of the basic principles underlying HDLs. Hardware Description Languages is the first book to unlock the often hidden science of HDLs along with their origins and basic concepts. This indispensable guide explains HDLs and includes an insightful overview of the foremost HDLs of the past three decades, from "Computer Design Language" (CDL) to "Very High Speed Integrated Circuit" (VHSIC) to "VHSIC Hardware Description Language" (VHDL). To improve both your knowledge and digital designs of HDL fundamentals, this valuable book features these essential topics:

  • A critical review of VHDL and Verilog
  • Accurate modeling of hardware
  • Distributed simulation of behavior models
  • New semantics for transport delay

Hardware Description Languages is written for practicing electronic CAD engineers, researchers in simulation and verification of electronic CAD, graduate and doctoral students in computer design, and undergraduates specializing in electronic hardware design.

 

 

Table of Contents:

Preface.

Acknowledgments.

List of Figures.

List of Tables.

The Origin of HDLs.

Evolutionary Development of the Early HDLs.

Fundamental Requirements of Behavior-level HDLs.

The First Behavior-Level HDL—ADLIB-SABLE.

Verilog HDL.

Design of a Concurrent HDL in Ada from First Principles.

VHDL.

Case Studies: Developing Hardware Descriptions for Real-world Digital Systems.

Simulation Algorithms for Concurrent Execution of HDLs on Loosely-coupled Parallel Processors.

On the Concept of Transport Delay in HDLs.

The Future of HDLs and Philosophical Reflection.

Bibliography.

Index.

About the Author.

商品描述(中文翻譯)

描述:
《電子工程硬體描述語言的概念與原則》是IEEE Press微電子系統系列中的一卷,作者為Stuart K. Tewksbury和Joe E. Brewer,系列編輯。硬體描述語言(HDLs)是未來處理器設計的關鍵,但至今尚未有書籍提供對HDLs基本原則的清晰分析。《硬體描述語言》是第一本揭示HDLs背後隱藏科學的書籍,並探討其起源和基本概念。這本不可或缺的指南解釋了HDLs,並提供了過去三十年最重要的HDLs的深入概述,從「計算機設計語言」(CDL)到「超高速積體電路」(VHSIC)再到「VHSIC硬體描述語言」(VHDL)。為了提升您對HDL基本原則的知識和數位設計,這本有價值的書籍涵蓋了以下重要主題:
- VHDL和Verilog的批判性回顧
- 硬體的準確建模
- 行為模型的分散式模擬
- 運輸延遲的新語義

《硬體描述語言》是為實務電子CAD工程師、電子CAD模擬與驗證研究人員、計算機設計的碩士及博士生,以及專攻電子硬體設計的本科生所撰寫。

目錄:
前言
致謝
圖表清單
表格清單
HDLs的起源
早期HDLs的演變發展
行為級HDLs的基本要求
第一個行為級HDL—ADLIB-SABLE
Verilog HDL
從基本原則設計的Ada並行HDL
VHDL
案例研究:為現實世界數位系統開發硬體描述
在鬆散耦合的並行處理器上並行執行HDLs的模擬演算法
HDLs中運輸延遲的概念
HDLs的未來與哲學反思
參考文獻
索引
關於作者