Digital Systems Design with VHDL and Synthesis: An Integrated Approach
暫譯: 數位系統設計:VHDL 與綜合的整合方法
K. C. Chang
- 出版商: IEEE
- 出版日期: 1999-05-11
- 售價: $1,100
- 貴賓價: 9.5 折 $1,045
- 語言: 英文
- 頁數: 516
- 裝訂: Hardcover
- ISBN: 0769500234
- ISBN-13: 9780769500232
無法訂購
買這商品的人也買了...
-
$1,120$1,098 -
$1,200$1,176 -
$680$537 -
$2,660$2,527 -
$1,068Software Engineering, 6/e
-
$970Introduction to Algorithms, 2/e
-
$880$695 -
$1,029Operating System Concepts, 6/e (Windows XP Update)
-
$450$351 -
$1,900$1,805 -
$1,930$1,834 -
$280$218 -
$650$514 -
$580$458 -
$760$600 -
$580$493 -
$590$466 -
$680$537 -
$690$538 -
$420$332 -
$720$569 -
$750$638 -
$490$382 -
$560$476 -
$931Computers, 12/e (IE)
相關主題
商品描述
Table of Contents:
Chapter 1: Introduction.
Chapter 2: VHDL and Digital Circuit Primitives.
Chapter 3: VHDL Simulation and Synthesis Environment and Design Process.
Chapter 4: Basic Combinational Circuits.
Chapter 5: Basic Binary Arithmetic Circuits.
Chapter 6: Basic Sequential Circuits.
Chapter 7: Registers.
Chapter 8: Clock and Reset Circuits.
Chapter 9: Dual-Port RAM, FIFO, and DRAM Modeling.
Chapter 10: A Design Case Study: Finite Impulse Response Filter ASIC Design.
Chapter 11: A Design Case Study: A Microprogram Controller Design.
Chapter 12: Error Detection and Correction.
Chapter 13: Fixed-Point Multiplication.
Chapter 14: Fixed-Point Division.
Chapter 15: Floating-Point Arithmetic.
Appendix A: Package Pack.
Index.
商品描述(中文翻譯)
目錄:
第一章:介紹
第二章:VHDL 與數位電路基本元件
第三章:VHDL 模擬與綜合環境及設計流程
第四章:基本組合電路
第五章:基本二進位算術電路
第六章:基本序列電路
第七章:暫存器
第八章:時鐘與重置電路
第九章:雙埠 RAM、FIFO 與 DRAM 建模
第十章:設計案例研究:有限脈衝響應濾波器 ASIC 設計
第十一章:設計案例研究:微程式控制器設計
第十二章:錯誤檢測與修正
第十三章:定點乘法
第十四章:定點除法
第十五章:浮點運算
附錄 A:封裝包
索引