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Description
This Second Edition focuses on emerging topics and advances in the field of VLSI interconnections
In the decade since High-Speed VLSI Interconnections was first published, several major developments have taken place in the field. Now, updated to reflect these advancements, this Second Edition includes new information on copper interconnections, nanotechnology circuit interconnects, electromigration in the copper interconnections, parasitic inductances, and RLC models for comprehensive analysis of interconnection delays and crosstalk.
Each chapter is designed to exist independently or as a part of one coherent unit, and several appropriate exercises are provided at the end of each chapter, challenging the reader to gain further insight into the contents being discussed. Chapter subjects include:
*
Preliminary Concepts
*
Parasitic Resistances, Capacitances, and Inductances
*
Interconnection Delays
*
Crosstalk Analysis
*
Electromigration-Induced Failure Analysis
*
Future Interconnections
High-Speed VLSI Interconnections, Second Edition is an indispensable reference for high-speed VLSI designers, RF circuit designers, and advanced students of electrical engineering.
Table of Contents
1. Preliminary Concepts and More.
1.1 Interconnections for VLSI Applications.
1.1.1 Metallic Interconnections - Multilevel, Multilayer and Multipath Configurations.
1.1.2 Optical Interconnections.
1.1.3 Superconducting Interconnections.
1.2 Copper Interconnections.
1.2.1 Advantages of Copper Interconnections.
1.2.2 Challenges Posed by Copper Interconnections.
1.2.3 Fabrication Processes for Copper Interconnections.
1.2.4 Damascene Processing of Copper Interconnections.
1.3 Method of Images.
1.4 Method of Moments.
1.5 Even and Odd Mode Capacitances.
1.5.1 Two Coupled Conductors.
1.5.2 Three Coupled Conductors.
1.6 Transmission Line Equations.
1.7 Miller’s Theorem.
1.8 Inverse Laplace Transformation.
1.9 A Resistive Interconnection as a Ladder Network.
1.9.1 Open Circuit Interconnection.
1.9.2 Short Circuited Interconnection.
1.9.3 Application of the Ladder Approximation to a Multipath Interconnection.
1.10 Propagation Modes in a Microstrip Interconnection.
1.11 Slow-Wave Mode Propagation.
1.11.1 Quasi-TEM Analysis.
1.11.2 Comparison with Experimental Results.
1.12 Propagation Delays.
Exercises.
References.
2. Parasitic Resistances, Capacitances and Inductances.
2.1 Parasitic Resistances - General Considerations.
2.2 Parasitic Capacitances - General Considerations.
2.2.1 Parallel Plate Capacitance.
2.2.2 Fringing Capacitances.
2.2.3 Coupling Capacitances.
2.3 Parasitic Inductances - General Considerations.
2.3.1 Self and Mutual Inductances.
2.3.2 Partial Inductances.
2.3.3 Methods for Inductance Extraction.
2.3.4 Effect of Inductances on Interconnection Delays.
2.4 Approximate Formulas for Capacitances.
2.4.1 Single Line on a Ground Plane.
2.4.2 Two Lines on a Ground Plane.
2.4.3 Three Lines on a Ground Plane.
2.4.4 Single Plate with Finite Dimensions on a Ground Plane.
2.5 The Green’s Function Method - Using Method of Images.
2.5.1 Green’s Function Matrix for Interconnections Printed on the Substrate.
2.5.2 Green’s Function Matrix for Interconnections Embedded in the Substrate.
2.5.3 Application of the Method of Moments.
2.5.4 Even and Odd Mode Capacitances.
2.5.5 Ground and Coupling Capacitances.
2.5.6 The Program IPCSGV.
2.5.7 Parametric Dependence of Interconnection Capacitances.
2.6 The Green’s Function Method - Fourier Integral Approach.
2.6.1 Green’s Function for Multilevel Interconnections.
2.6.2 Multiconductor Interconnection Capacitances.
2.6.3 Piecewise Linear Charge Distribution Function.
2.6.4 Calculation of Interconnection Capacitances.
2.7 The Network Analogue Method.
2.7.1 Representation of Subregions by Network Analogues.
2.7.2 Diagonalized System for Single Level Interconnections.
2.7.3 Diagonalized System for Multilevel Interconnections.
2.7.4 Interconnection Capacitances and Inductances.
2.7.5 The Program “ICIMPGV”.
2.7.6 Parametric Dependence of Interconnection Capacitances.
2.7.7 Parametric Dependence of Interconnection Inductances.
2.8 Simplified Formulas for Interconnection Capacitances and Inductances on Silicon and GaAs Substrates.
2.8.1 Line Capacitances and Inductances.
2.8.2 Coupling Capacitances and Inductances.
2.9 Inductance Extraction Using FastHenry.
2.9.1 The Program "FastHenry".
2.9.2 Extraction Results Using FastHenry.
2.10 Copper Interconnections - Resistance Modeling.
2.10.1 Effect of Surface/Interface Scattering on the Interconnection Resistivity.
2.10.2 Effect of Diffusion Barrier on the Interconnection Resistivity.
2.11 Electrode Capacitances in a GaAs MESFET - An Application of the Program IPCSGV.
2.11.1 Ground and Coupling Capacitances.
2.11.2 The Program “EPCSGM”.
2.11.3 Dependence on MESFET Dimensions.
2.11.4 Comparison with Internal MESFET Capacitances.
Exercises.
References.
3. Interconnection Delays.
3.1 Metal-Insulator-Semiconductor Microstrip Line Model of an Interconnection.
3.1.1 The Model.
3.1.2 Simulation Results.
3.2 Transmission Line Analysis of Single Level Interconnections.
3.2.1 The Model.
3.2.2 The Program “PDSIGV”.
3.2.3 Dependence on Interconnection Parameters.
3.3 Transmission Line Analysis of Parallel Multilevel Interconnections.
3.3.1 The Model.
3.3.2 Numerical Simulation Results.
3.4 Analysis of Crossing Interconnections.
3.4.1 Simplified Analysis of Crossing Interconnections.
3.4.2 Comprehensive Analysis of Crossing Interconnections.
3.4.3 The Program “SPBIGV”.
3.4.4 Simulation Results Using SPBIGV3.5Parallel Interconnections Modeled as Multiple Coupled Microstrips.
3.5.1 The Model.
3.5.2 Simulation Results.
3.6 Modeling of Lossy Parallel and Crossing Interconnections as Coupled Lumped Distributed Systems.
3.6.1 The Model.
3.6.2 Simulation Results.
3.7 Very High Frequency Losses in a Microstrip Interconnection.
3.7.1 The Model.
3.7.2 Simulation Results.
3.7.3 Interconnection Delays With the High-Frequency Effects.
3.8 Compact Expressions for Interconnection Delays.
3.8.1 The RC Interconnection Model.
3.8.2 The RLC Interconnection Model - A Single Semi-Infinite Line.
3.8.3 The RLC Interconnection Model - A Single Finite Line.
3.8.4 Single RLC Interconnection - Delay Time.
3.8.5 Two and Three Coupled RLC Interconnections - Delay Times.
3.9 Interconnection Delays in Multilayer Integrated Circuits.
3.9.1 The Simplified Model.
3.9.2 Simulation Results and Discussion.
3.10 Active Interconnections.
3.10.1 Interconnection Delay Model.
3.10.2 Active Interconnection Driven by Minimum Size Inverters.
3.10.3 Active Interconnection Driven by Optimum Size Inverters.
3.10.4 Active Interconnection Driven by Cascaded Inverters.
3.10.5 Dependence of Propagation Time on the Interconnection Driving Mechanism.
Exercises.
References.
4. Crosstalk Analysis.
4.1Lumped Capacitance Approximation.
4.2Coupled Multiconductor MIS Microstrip Line Model of Single Level Interconnections.
4.2.1 The Model.
4.2.2 Numerical Simulations.
4.2.3 Crosstalk Reduction.
4.3 Frequency Domain Modal Analysis of Single Level Interconnections.
4.3.1 The General Technique.
4.3.2 Two-Line System.
4.3.3 Three-Line System.
4.3.4 Four-Line System.
4.3.5 Simulation Results.
4.4 Transmission Line Analysis of Parallel Multilevel Interconnections.
4.4.1 The Model.
4.4.2 The Program “DCMPVI”.
4.4.3 Numerical Simulations Using DCMPVI.
4.5 Analysis of Crossing Interconnections.
4.5.1 Effect of Crossing Interconnections.
4.5.2 Comprehensive Analysis of Crossing Interconnections.
4.6 Compact Expressions for Crosstalk Analysis.
4.6.1 Distributed RC Model for Two Coupled Interconnections.
4.6.2 Distributed RLC Model for Two Coupled Interconnections.
4.6.3 Distributed RLC Model for Three Coupled Interconnections.
4.7 Multiconductor Buses in GaAs High-Speed Logic Circuits.
4.7.1 The Model.
4.7.2 Lossless MBUS with Cyclic Boundary Conditions.
4.7.3 Simulation Results.
Exercises.
References.
5. Electromigration-Induced Failure Analysis.
5.1 Electromigration in VLSI Interconnection Metallizations - An Overview.
5.1.1 Problems Caused by Electromigration.
5.1.2 Electromigration Mechanism and Factors.
5.1.3 Electromigration Under Pulsed-DC and AC Conditions.
5.1.4 Testing and Monitoring of Electromigration.
5.1.5 General Guidelines for Testing Electromigration.
5.1.6 Reduction of Electromigration.
5.2 Models of IC Reliability.
5.2.1 Arrhenius Model.
5.2.2 Mil-Hdbk-217D Model.
5.2.3 Series Model.
5.2.4 Series-Parallel Model.
5.3 Modeling of Electromigration Due to Repetitive Pulsed Currents.
5.3.1 Modeling of Physical Processes.
5.3.2 First-Order Model Development.
5.3.3 Modeling Results for DC Currents.
5.3.4 Modeling Results for Pulsed Currents.
5.4 Electromigration in the Copper Interconnections.
5.4.1 Electromigration Under DC Conditions.
5.4.2 Electromigration Under Pulsed DC Condition.
5.4.3 Electromigration Under Bipolar AC Conditions.
5.5 Failure Analysis of VLSI Interconnection Components.
5.5.1 Reduction of Components into Straight Segments.
5.5.2 Calculation of MTF and Lognormal Standard Deviation.
5.5.3 The Program “EMVIC”.
5.5.4 Simulation Results Using EMVIC.
5.6 Computer-Aided Failure Analysis.
5.6.1 “RELIANT” for Reliability of VLSI Interconnections.
5.6.2 “SPIDER” for Checking Current Density and Voltage Drops in the Interconnection Metallizations.
Exercises.
References.
6. Future Interconnections.
6.1 Optical Interconnections.
6.1.1 Advantages of Optical Interconnections.
6.1.2 Systems Issues and Challenges.
6.1.3 Material Processing Issues and Challenges.
6.1.4 Design Issues and Challenges.
6.2 Transmission Line Models of Lossy Waveguide Interconnections.
6.2.1 Lossy Waveguide with Single Propagating Wave.
6.2.2 Equivalent Circuits for Waveguide Drivers and Loads.
6.2.3 Lossy Waveguide in an Inhomogenous Medium.
6.3 Superconducting Interconnections.
6.3.1 Advantages of Superconducting Interconnections.
6.3.2 Propagation Characteristics of Superconducting Interconnections.
6.3.3 Comparison with Normal Metal Interconnections.
6.4 Nanotechnology Circuit Interconnections - Potential Technologies.
6.4.1 Silicon Nanowires and Metallic Interconnections.
6.4.2 Nanotube Interconnections.
6.4.3 Quantum Cell Based Wireless Interconnections.
6.5 Nanotube Integrated Circuits.
6.5.1 Nanotube Interconnections and Vias.
6.5.2 Comparison of Nanotube and Copper Interconnections.
6.5.3 Nanotubes for High Frequency Applications.
Exercises.
References.
CD-ROM.
Appendix 2.1: Listing of the Program “IPCSGV” for Calculating the Parasitic Capacitances for Single Level Interconnections on GaAs-Based VLSI Using the Green’s Function Method.
Appendix 2.2: Listing of the Program “ICIMPGV” for Calculating the Parasitic Capacitances and Inductances for Multilevel Interconnections on GaAs-Based VLSI Using the Network Analogue Method.
Appendix 2.3: Listing of the Program “EPCSGM” for Calculating the Electrode Parasitic Capacitances in a Single-Gate GaAs MESFET.
Appendix 3.1: Listing of the Program “PDSIGV” for Calculating the Propagation Delays in the Single Level Interconnections on GaAs-Based VLSI.
Appendix 3.2: Listing of the Program "IPDMSR" for Calculating the Propagation delays in an Interconnection Driven by Minimum Size Repeaters.
Appendix 3.3: Listing of the Program "IPDOSR" for Calculating the Propagation delays in an Interconnection Driven by Optimum Size Repeaters.
Appendix 3.4: Listing of the Program "IPDCR" for Calculating the Propagation delays in an Interconnection Driven by Cascaded Repeaters.
Appendix 4.1: Listing of the Program “DCMPVI” for Delay and Crosstalk Analysis of Multilevel Parallel VLSI Interconnections.
Appendix 4.2: Listing of the Program “SPBIGV” for Signal Propagation Analysis of Bilevel Crossing Interconnections on GaAs-Based VLSI.
Appendix 5.1: Listing of the Program “EMVIC” for Electromigration-Induced Failure Analysis of VLSI Interconnection Components.
Index.
商品描述(中文翻譯)
**描述**
本書第二版專注於VLSI互連領域的新興主題和進展。自從《高速VLSI互連》首次出版以來,該領域發生了幾個重大發展。現在,這本第二版已更新以反映這些進展,包含有關銅互連、納米技術電路互連、銅互連中的電遷移、寄生電感以及RLC模型以進行互連延遲和串擾的綜合分析的新資訊。
每一章都設計為獨立存在或作為一個連貫單元的一部分,並在每章結尾提供幾個適當的練習,挑戰讀者深入理解所討論的內容。章節主題包括:
* 初步概念
* 寄生電阻、電容和電感
* 互連延遲
* 串擾分析
* 電遷移引起的失效分析
* 未來的互連
《高速VLSI互連,第二版》是高速VLSI設計師、RF電路設計師和電機工程高級學生不可或缺的參考書。
**目錄**
1. 初步概念及更多。
1.1 VLSI應用的互連。
1.1.1 金屬互連 - 多層、多層次和多路徑配置。
1.1.2 光學互連。
1.1.3 超導互連。
1.2 銅互連。
1.2.1 銅互連的優勢。
1.2.2 銅互連所帶來的挑戰。
1.2.3 銅互連的製造過程。
1.2.4 銅互連的達馬斯克工藝。
1.3 影像法。
1.4 矩量法。
1.5 偶數和奇數模式電容。
1.5.1 兩個耦合導體。
1.5.2 三個耦合導體。
1.6 傳輸線方程。
1.7 米勒定理。
1.8 反拉普拉斯變換。
1.9 作為梯形網路的電阻互連。
1.9.1 開路互連。
1.9.2 短路互連。
1.9.3 梯形近似在多路徑互連中的應用。
1.10 微帶互連中的傳播模式。
1.11 慢波模式傳播。
1.11.1 準TEM分析。
1.11.2 與實驗結果的比較。
1.12 傳播延遲。
練習。
參考文獻。
2. 寄生電阻、電容和電感。
2.1 寄生電阻 - 一般考量。
2.2 寄生電容 - 一般考量。
2.2.1 平行板電容。
2.2.2 邊緣電容。
2.2.3 耦合電容。
2.3 寄生電感 - 一般考量。
2.3.1 自感和互感。
2.3.2 部分電感。
2.3.3 電感提取方法。
2.3.4 電感對互連延遲的影響。
2.4 電容的近似公式。
2.4.1 在接地平面上的單條線。
2.4.2 在接地平面上的兩條線。
2.4.3 在接地平面上的三條線。
2.4.4 在接地平面上的有限尺寸單板。
2.5 格林函數法 - 使用影像法。
2.5.1 印刷在基板上的互連的格林函數矩陣。
2.5.2 嵌入基板中的互連的格林函數矩陣。
2.5.3 矩量法的應用。
2.5.4 偶數和奇數模式電容。
2.5.5 接地和耦合電容。
2.5.6 程式 IPCSGV。
2.5.7 互連電容的參數依賴性。
2.6 格林函數法 - 傅立葉積分方法。
2.6.1 多層互連的格林函數。
2.6.2 多導體互連電容。
2.6.3 分段線性電荷分佈函數。
2.6.4 互連電容的計算。
2.7 網路類比法。
2.7.1 透過網路類比表示子區域。
2.7.2 單層互連的對角化系統。
2.7.3 多層互連的對角化系統。
2.7.4 互連電容和電感。
2.7.5 程式 “ICIMPGV”。
2.7.6 互連電容的參數依賴性。
2.7.7 互連電感的參數依賴性。
2.8 硅和GaAs基板上互連電容和電感的簡化公式。
2.8.1 線電容和電感。
2.8.2 耦合電容和電感。
2.9 使用FastHenry進行電感提取。
2.9.1 程式 'FastHenry'。
2.9.2 使用FastHenry的提取結果。
2.10 銅互連 - 電阻建模。
2.10.1 表面/界面散射對互連電阻率的影響。
2.10.2 擴散障礙對互連電阻率的影響。
2.11 GaAs MESFET中的電極電容 - 程式 IPCSGV 的應用。
2.11.1 接地和耦合電容。
2.11.2 程式 “EPCSGM”。
2.11.3 對MESFET尺寸的依賴性。
2.11.4 與內部MESFET電容的比較。
練習。
參考文獻。
3. 互連延遲。
3.1 金屬-絕緣體-半導體微帶線模型的互連。
3.1.1 模型。
3.1.2 模擬結果。
3.2 單層互連的傳輸線分析。
3.2.1 模型。
3.2.2 程式 “PDSIGV”。
3.2.3 對互連參數的依賴性。
3.3 平行多層互連的傳輸線分析。
3.3.1 模型。
3.3.2 數值模擬結果。
3.4 交叉互連的分析。
3.4.1 交叉互連的簡化分析。
3.4.2 交叉互連的綜合分析。
3.4.3 程式 “SPBIGV”。
3.4.4 使用SPBIGV3.5的模擬結果。
3.5 將平行和交叉互連建模為耦合的集中分佈系統。
3.5.1 模型。
3.5.2 模擬結果。
3.6 微帶互連中的超高頻損耗。
3.6.1 模型。
3.6.2 模擬結果。
3.6.3 考慮高頻效應的互連延遲。
3.7 互連延遲的緊湊表達式。
3.7.1 RC互連模型。
3.7.2 RLC互連模型 - 單個半無限線。
3.7.3 RLC互連模型 - 單個有限線。
3.7.4 單個RLC互連 - 延遲時間。
3.7.5 兩個和三個耦合RLC互連 - 延遲時間。
3.8 多層集成電路中的互連延遲。
3.8.1 簡化模型。
3.8.2 模擬結果和討論。
3.9 主動互連。
3.9.1 互連延遲模型。
3.9.2 由最小尺寸反相器驅動的主動互連。
3.9.3 由最佳尺寸反相器驅動的主動互連。
3.9.4 由級聯反相器驅動的主動互連。
3.9.5 傳播時間對互連驅動機制的依賴性。
練習。
參考文獻。
4. 串擾分析。
4.1 集中電容近似。
4.2 耦合多導體MIS微帶線模型的單層互連。
4.2.1 模型。
4.2.2 數值模擬。
4.2.3 串擾減少。
4.3 單層互連的頻域模態分析。
4.3.1 一般技術。
4.3.2 兩線系統。
4.3.3 三線系統。
4.3.4 四線系統。
4.3.5 模擬結果。
4.4 平行多層互連的傳輸線分析。
4.4.1 模型。
4.4.2 程式 “DCMPVI”。
4.4.3 使用DCMPVI的數值模擬。
4.5 交叉互連的分析。
4.5.1 交叉互連的影響。
4.5.2 交叉互連的綜合分析。
4.6 串擾分析的緊湊表達式。
4.6.1 兩個耦合互連的分佈RC模型。
4.6.2 兩個耦合互連的分佈RLC模型。
4.6.3 三個耦合互連的分佈RLC模型。
4.7 GaAs高速邏輯電路中的多導體總線。
4.7.1 模型。
4.7.2 具有循環邊界條件的無損MBUS。
4.7.3 模擬結果。
練習。
參考文獻。
5. 電遷移引起的失效分析。
5.1 VLSI互連金屬化中的電遷移 - 概述。
5.1.1 電遷移引起的問題。
5.1.2 電遷移機制和因素。
5.1.3 在脈衝直流和交流條件下的電遷移。
5.1.4 電遷移的測試和監控。
5.1.5 測試電遷移的一般指導方針。
5.1.6 減少電遷移。
5.2 IC可靠性的模型。
5.2.1 阿倫紐斯模型。
5.2.2 Mil-Hdbk-217D模型。
5.2.3 串聯模型。
5.2.4 串並聯模型。
5.3 由重複脈衝電流引起的電遷移建模。
5.3.1 物理過程的建模。
5.3.2 一階模型的開發。
5.3.3 直流電流的建模結果。
5.3.4 脈衝電流的建模結果。
5.4 銅互連中的電遷移。
5.4.1 在直流條件下的電遷移。
5.4.2 在脈衝直流條件下的電遷移。
5.4.3 在雙極交流條件下的電遷移。
5.5 VLSI互連元件的失效分析。
5.5.1 將元件簡化為直線段。
5.5.2 MTF和對數正態標準差的計算。
5.5.3 程式 “EMVIC”。
5.5.4 使用EMVIC的模擬結果。
5.6 電腦輔助失效分析。
5.6.1 “RELIANT”用於VLSI互連的可靠性。
5.6.2 “SPIDER”用於檢查互連金屬化中的電流密度和電壓降。
練習。
參考文獻。
6. 未來的互連。
6.1 光學互連。
6.1.1 光學互連的優勢。
6.1.2 系統問題和挑戰。
6.1.3 材料處理問題和挑戰。
6.1.4 設計問題和挑戰。