Advanced Interconnects for ULSI Technology (Hardcover)
暫譯: 超大規模集成技術的先進互連技術 (精裝版)

Mikhail Baklanov, Paul S. Ho, Ehrenfried Zschech

商品描述

Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance.

Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses:

  • Interconnect functions, characterisations, electrical properties and wiring requirements
  • Low-k materials: fundamentals, advances and mechanical  properties
  • Conductive layers and barriers
  • Integration and reliability including mechanical reliability, electromigration and electrical breakdown
  • New approaches including 3D, optical, wireless interchip, and carbon-based interconnects

Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.

商品描述(中文翻譯)

尋找適合銅/低介電常數(low-k)互連的新材料對於計算機晶片的持續發展至關重要。雖然銅/低-k 互連已經表現良好,使得超大規模集成(Ultra Large Scale Integration, ULSI)設備的創建成為可能,這些設備將超過十億個晶體管集成在單一晶片上,但在更小的尺度下,增加的電阻和RC延遲已成為影響晶片性能的重要因素。

《ULSI技術的先進互連》專注於可能的替代材料和方法。它涵蓋了從物理原理到設計、製造、特性化和新材料在納米互連中的應用等廣泛主題,並討論了:

- 互連的功能、特性、電氣性能和布線要求
- 低-k 材料:基本原理、進展和機械性能
- 導電層和障礙層
- 整合性和可靠性,包括機械可靠性、電遷移和電氣擊穿
- 新方法,包括3D、光學、無線晶片間互連和基於碳的互連

本書旨在為研究生和學術界及產業中的研究人員提供對於未來計算機晶片發展核心技術的關鍵概述。