High-Performance Energy-Efficient Microprocessor Design
暫譯: 高效能節能微處理器設計

Vojin G. Oklobdzija, Ram K. Krishnamurthy

  • 出版商: Springer
  • 出版日期: 2006-08-09
  • 售價: $6,890
  • 貴賓價: 9.5$6,546
  • 語言: 英文
  • 頁數: 338
  • 裝訂: Hardcover
  • ISBN: 0387285946
  • ISBN-13: 9780387285948
  • 海外代購書籍(需單獨結帳)

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Description

Microprocessors of today contain close to a billion transistors, while achieving the performance of super-computers just a decade ago. Designing such processors takes hundreds of people organized into large teams. High Performance Energy Efficient Microprocessor Design is written by the world’s most prominent microprocessor design leaders from the industry and academia. It provides a complete coverage of all the aspects of a complex microprocessor design process from technology, power management, clocking, high-performance architecture, design methodologies, memory and I/O design, computer aided design, testing and design for testability. The chapters are written to provide the latest state of the art knowledge of particular aspects of microprocessor design, while including sufficient tutorial content in order to bring non-experts up to speed. High Performance Energy Efficient Microprocessor Design is intended to be a useful companion book for every design engineer working in the related areas and a source of technical information as well as a comprehensive reference in the field. It should also serve as the source book for technical and business managers involved in microprocessor based design and manufacture. The chapters are organized in a way which makes it possible to use this book as a textbook for graduate courses in advanced digital and system design. The book is intended to highlight practical problems encountered in designing state of the art processors, while yet covering fundamental principles that are independent of technology.

 

Table of contents

1. Introduction; Oklobdzija et al.- 2. Ultra-low power processor design; Piguet.- 3. Design of energy-efficient digital circuits; Zeydel et al.- 4. Clocked storage elements in digital systems; Nedovic et al.- 5. Static memory design; Tzarzanis.- 6. Large-scale circuit placement; Agnihotri et al.- 7. Energy-delay characteristics of CMOS adders; Oklobdzija et al.- 8. High-performance energy-efficient dual-supply ALU design; Mathew et al.- 9. Binary floating-point unit design; Schwartz.- 10. Microprocessor architecture for yield enhancement and reliable operation; Ando.- 11. How is bandwidth used in computers?; Emma.- 12. High Speed IO design; Andersen.- 13. Testing and design for test of microprocessors; Aktouf.- Index.

商品描述(中文翻譯)

**描述**

當今的微處理器包含近十億個晶體管,並且達到了十年前超級電腦的性能。設計這樣的處理器需要數百人組成的大型團隊。《高效能節能微處理器設計》由來自業界和學術界的世界頂尖微處理器設計領導者撰寫。該書全面涵蓋了複雜微處理器設計過程的各個方面,包括技術、電源管理、時鐘、高效能架構、設計方法論、記憶體和 I/O 設計、計算機輔助設計、測試及可測試性設計。各章節旨在提供微處理器設計特定方面的最新前沿知識,同時包含足夠的教學內容,以便讓非專家能夠迅速掌握。 《高效能節能微處理器設計》旨在成為每位在相關領域工作的設計工程師的有用伴侶書籍,並作為技術資訊的來源以及該領域的綜合參考資料。它也應該成為參與基於微處理器的設計和製造的技術及商業經理的參考書。各章節的組織方式使得本書可以作為高級數位和系統設計研究生課程的教科書。該書旨在突顯在設計最先進處理器時遇到的實際問題,同時涵蓋與技術無關的基本原則。

**目錄**

1. 介紹;Oklobdzija 等人 - 2. 超低功耗處理器設計;Piguet - 3. 節能數位電路設計;Zeydel 等人 - 4. 數位系統中的時鐘儲存元件;Nedovic 等人 - 5. 靜態記憶體設計;Tzarzanis - 6. 大規模電路佈局;Agnihotri 等人 - 7. CMOS 加法器的能量延遲特性;Oklobdzija 等人 - 8. 高效能節能雙供電 ALU 設計;Mathew 等人 - 9. 二進位浮點單元設計;Schwartz - 10. 用於提高產量和可靠運行的微處理器架構;Ando - 11. 計算機中如何使用帶寬?;Emma - 12. 高速 I/O 設計;Andersen - 13. 微處理器的測試及可測試性設計;Aktouf - 索引。