A Signal Integrity Engineer's Companion: Real-Time Test and Measurement and Design Simulation (Hardcover)
暫譯: 信號完整性工程師的夥伴:實時測試與測量及設計模擬 (精裝版)
Geoff Lawday, David Ireland, Greg Edlund
- 出版商: Prentice Hall
- 出版日期: 2008-06-22
- 售價: $1,330
- 語言: 英文
- 頁數: 496
- 裝訂: Hardcover
- ISBN: 0131860062
- ISBN-13: 9780131860063
已絕版
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商品描述
<內容簡介>
This is the industry’s most comprehensive, authoritative, and practical guide to modern Signal Integrity (SI) test and measurement for high-speed digital designs. Three of the field’s leading experts guide you through systematically detecting, observing, analyzing, and rectifying both modern logic signal defects and embedded system malfunctions. The authors cover the entire life cycle of embedded system design from specification and simulation onward, illuminating key techniques and concepts with easy-to-understand illustrations. Writing for all electrical engineers, signal integrity engineers, and chip designers, the authors show how to use real-time test and measurement to address today’s increasingly difficult interoperability and compliance requirements. They also present detailed, start-to-finish case studies that walk you through commonly encountered design challenges, including ensuring that interfaces consistently operate with positive timing margins without incurring excessive cost; calculating total jitter budgets; and managing complex tradeoffs in high-speed serial interface design.
<章節目錄>
Foreword xv
Preface xix
Acknowledgments xxviii
About the Authors xxx
1. Introduction: An Engineer’s Companion 1
2. Chip-to-Chip Timing and Simulation 31
3. Signal Path Analysis as an Aid to Signal Integrity 87
4. DDR2 Case Study 117
5. Real-Time Measurements: Probing 159
6. Testing and Debugging: Oscilloscopes and Logic Analyzers 213
7. Replicating Real-World Signals with Signal Sources 255
8. Signal Analysis and Compliance 287
9. PCI Express Case Study 367
10. The Wireless Signal 399
Index 439
商品描述(中文翻譯)
<內容簡介>
這是業界最全面、權威且實用的現代信號完整性(Signal Integrity, SI)測試與測量指南,專為高速數位設計而設。三位領域內的專家將指導您系統性地檢測、觀察、分析及修正現代邏輯信號缺陷和嵌入式系統故障。作者涵蓋了嵌入式系統設計的整個生命週期,從規格和模擬開始,並用易於理解的插圖闡明關鍵技術和概念。這本書是為所有電氣工程師、信號完整性工程師和晶片設計師而寫,作者展示了如何利用即時測試和測量來應對當今日益困難的互操作性和合規性要求。他們還提供了詳細的從頭到尾的案例研究,幫助您解決常見的設計挑戰,包括確保介面在不產生過高成本的情況下始終以正確的時序邊際運作;計算總抖動預算;以及在高速串行介面設計中管理複雜的權衡。
<章節目錄>
前言 xv
序言 xix
致謝 xxviii
關於作者 xxx
1. 介紹:工程師的夥伴 1
2. 晶片對晶片的時序與模擬 31
3. 信號路徑分析作為信號完整性的輔助工具 87
4. DDR2 案例研究 117
5. 即時測量:探針 159
6. 測試與除錯:示波器和邏輯分析儀 213
7. 使用信號源複製真實世界信號 255
8. 信號分析與合規性 287
9. PCI Express 案例研究 367
10. 無線信號 399
索引 439