Interconnect Technologies for Integrated Circuits and Flexible Electronics

本書提供了對於集成電路設計和柔性電子學的基本知識的全面理解，以及詳細的最先進新興互連技術。它專注於研究先進的片上互連，這些互連符合當前及未來的技術需求。內容涵蓋互連的不同方面，如材料、物理特性、寄生提取、設計、結構、建模、機器學習以及基於神經網絡的互連模型、信號方案、變化的信號完整性性能分析、變異性、可靠性方面及相關的電子設計自動化工具。本書還探討了柔性電子系統的互連技術，並強調了傳感器與可伸縮互連的整合，以展示可穿戴和柔性應用的可伸縮感測網絡概念。本書對於學術界和業界的工作者來說，是理解互連技術基本原理和應用的有用指南。

Dr. Yash Agrawal is faculty at Dhirubhai Ambani Institute of Information and Communication Technology (DA-IICT) Gandhinagar, Gujarat, India. He has accomplished his Postdoc in network-on-chip design and graphene materials from University of Rennes, France. He graduated with his Ph.D. and M.Tech. degrees from the National Institute of Technology (NIT) Hamirpur, HP, India. He attained university rank from Nagpur University during his B.E. degree in Electronics and Communication in 2009. He achieved the third place in all India Mentor Graphics design contest held at Bangalore, India, in 2011.

His research interest includes VLSI interconnects, EMC and signal integrity of high speed interconnects, optimization schemes, numerical method analysis, nanotechnology, network-on-chip designs, flexible electronics, FPGA based designs, image processing using VLSI architectures, VLSI design for bio-medical devices, etc. He has conductedvarious Government funded workshops and conferences. He has several publications in contributed books, journals, and various national and international conferences of repute. He has received IETE K. S. Krishnan Memorial Award for best system oriented paper in 2017. He is reviewer of various reputed journals. He is a member of IEEE and chair of IEEE SSC&ED societies, Gujarat section 2023.

Dr. Kavicharan Mummaneni received B.Tech degree in Electronics and Communication Engineering Department from JNTU Hyderabad, M.Tech degree in Electronics Design and Technology specialization from NIT Calicut and Ph.D in VLSI domain from NIT Warangal. Currently working as an Assistant Professor-I at National Institute of Technology Silchar. His research interests include: Microelectronic devices, VLSI interconnects, Signal Integrity, Power Integrity, Device Modelling, Carbon Nanotube Interconnects, Flexible electronic design. He has published several research papers and book chapters in the domain of Micro/Nanoelectronic devices and circuits. He is a Senior IEEE member and Fellow of IETE India.

Dr. P. Uma Sathyakam is working as Associate Professor in the School of Electrical Engineering, Vellore Institute of Technology, Vellore, where he earned his MS (by Research) in Nanoelectronics and VLSI in 2011 and his PhD in Nanoelectronics in 2018. Prior to this, he earned his BSc. Electronics from University of Kerala, Thiruvananthapuram in 2005 and MSc. Applied Electronics from Bharathiar University, Coimbatore with distinction and Gold medal in 2007.

He served as a Research Fellow in a MHRD sponsored project on 'Development of online Lab in Microelectronics and VLSI' at VIT. He was also a Research Associate during his MS at VIT. He has more than 13 years of teaching and research experience.

His current research interests are nano-electrodes for supercapacitors, Plasmonics, VLSI interconnects, carbon nanotube electronics, graphene, electronic materials and renewable energy materials. He has authored three books and 25 papers in peer reviewed journals and conferences. He is an Associate Editor of Nanotechnology for Environmental Engineering, a Springer Nature journal. He is also a peer reviewer for many journals. He has reviewed more than 75 papers for journals from IEEE, Elsevier, Springer, IET, Nature, Taylor & Francis, Trans Tech Publishers, and Wiley. He is a Senior Member of IEEE EDS/EPS.

Dr. Yash Agrawal 是印度古吉拉特邦甘地納格爾的 Dhirubhai Ambani 信息與通信技術學院 (DA-IICT) 的教職員。他在法國雷恩大學完成了網路晶片設計和石墨烯材料的博士後研究。他在印度哈米爾普爾國立技術學院 (NIT Hamirpur) 獲得博士和碩士學位。他在 2009 年於納格浦大學獲得電子與通信工程學士學位時，取得了大學排名。他在 2011 年於印度班加羅爾舉辦的全印度 Mentor Graphics 設計比賽中獲得第三名。

他的研究興趣包括 VLSI 互連、高速互連的電磁相容性 (EMC) 和信號完整性、優化方案、數值方法分析、奈米技術、網路晶片設計、柔性電子、基於 FPGA 的設計、使用 VLSI 架構的影像處理、生醫設備的 VLSI 設計等。他主持過多個政府資助的工作坊和會議，並在多本貢獻書籍、期刊及各類國內外知名會議上發表了多篇論文。他於 2017 年獲得 IETE K. S. Krishnan 紀念獎，表彰其最佳系統導向論文。他是多本知名期刊的審稿人，並且是 IEEE 的會員，擔任 2023 年古吉拉特區 IEEE SSC&ED 社會的主席。

Dr. Kavicharan Mummaneni 於 JNTU 海得拉巴獲得電子與通信工程學士學位，並在 NIT Calicut 獲得電子設計與技術專業的碩士學位，隨後在 NIT Warangal 獲得 VLSI 領域的博士學位。目前，他在國立技術學院 Silchar 擔任助理教授。他的研究興趣包括微電子設備、VLSI 互連、信號完整性、電源完整性、設備建模、碳奈米管互連、柔性電子設計。他在微/奈米電子設備和電路領域發表了多篇研究論文和書籍章節。他是 IEEE 的高級會員，也是 IETE 印度的院士。

Dr. P. Uma Sathyakam 在維洛爾技術學院的電氣工程學院擔任副教授，並於 2011 年獲得奈米電子學和 VLSI 的研究碩士學位，2018 年獲得奈米電子學博士學位。在此之前，他於 2005 年在喀拉拉邦的喀拉拉大學獲得電子學學士學位，並於 2007 年在科印巴托的 Bharathiar 大學以優異成績和金獎獲得應用電子學碩士學位。

他曾在 VIT 擔任 MHRD 贊助的「微電子學和 VLSI 在線實驗室的開發」項目的研究員。在 VIT 獲得碩士學位期間，他也曾擔任研究助理。他擁有超過 13 年的教學和研究經驗。

他目前的研究興趣包括超級電容器的奈米電極、等離子體學、VLSI 互連、碳奈米管電子學、石墨烯、電子材料和可再生能源材料。他已出版三本書和 25 篇同行評審的期刊及會議論文。他是《環境工程奈米技術》一書的副編輯，該書由 Springer Nature 出版。他也是多本期刊的同行評審人，已為 IEEE、Elsevier、Springer、IET、Nature、Taylor & Francis、Trans Tech Publishers 和 Wiley 的期刊審稿超過 75 篇。他是 IEEE EDS/EPS 的高級會員。