3D Integration for VLSI Systems (Hardcover)
暫譯: VLSI 系統的 3D 整合 (精裝版)

Chuan Seng Tan , Kuan-Neng Chen , Steven J. Koester

  • 出版商: Pan Stanford Publish
  • 出版日期: 2011-09-26
  • 售價: $1,500
  • 貴賓價: 9.8$1,470
  • 語言: 英文
  • 頁數: 350
  • 裝訂: Hardcover
  • ISBN: 981430381X
  • ISBN-13: 9789814303811
  • 相關分類: VLSI
  • 下單後立即進貨 (約5~7天)

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<內容簡介>

Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usually include a stack of several thinned IC layers that are vertically bonded and interconnected by through silicon via TSV.

There is a long string of benefits that one can derive from 3D IC implementation such as form factor, density multiplication, improved delay and power, enhanced bandwidth, and heterogeneous integration. This book presents contributions by key researchers in this field, covering motivations, technology platforms, applications, and other design issues.

 

商品描述(中文翻譯)

內容簡介

三維(3D)整合被認為是集成電路(IC)持續性能增長的一個可能途徑,因為傳統的縮放方法面臨著前所未有的基本和經濟限制挑戰。晶圓級3D IC可以有幾種形式,通常包括幾個經過薄化的IC層的堆疊,這些層通過矽通孔(TSV)垂直連接和互連。

實施3D IC可以帶來一系列的好處,例如形狀因子、密度倍增、延遲和功耗改善、帶寬增強以及異質整合。本書介紹了該領域主要研究者的貢獻,涵蓋了動機、技術平台、應用及其他設計問題。