Proceedings of the Third International Conference on Microelectronics, Computing and Communication Systems: McCs 2018
暫譯: 第三屆國際微電子、計算與通信系統會議論文集：McCs 2018

本書呈現了第三屆國際微電子、計算與通信系統會議（MCCS 2018）的高品質論文。內容討論了MEMS（微機電系統）和奈米電子學、無線通信、光通信、儀器儀表、信號處理、影像處理、生物工程、綠色能源、混合動力車輛、環境科學、天氣預報、雲計算、可再生能源、RFID、CMOS感測器、致動器、轉換器、遙測系統、嵌入式系統及感測器網路應用等最新技術趨勢與進展。書中包含基於原創理論、實踐及實驗模擬、開發、應用、測量和測試的論文。書中討論的應用與解決方案為未來產品開發提供了優秀的參考資料。

Dr. Vijay Nath was born in Gorakhpur (U.P.) India in 1976. He received his Bachelor degree in Physics and Master degree in Electronics from DDU Gorakhpur University, India in 1998 and 2001. He also received PGDCN (GM) from MMMUT Gorakhpur in 1999. He received his Ph.D. degree in VLSI Design & Technology from Dr. RML Avadh University Faizabad in association with CEERI-Pilani in 2008. From 2000 to 2001 he served as project trainee in IC Design Group CEERI Pilani under the guidance of Dr. K.S.Yadav (Senior Scientist). From 2002 to 2006 he severed as faculty in the Department of Electronics, DDU University Gorakhpur. In 2006, he joined as a faculty in the Department of Electronics and Communication Engineering, Birla Institute of Technology Mesra Ranchi (JH) India. Presently he is Professor In-charge of Embedded System Design Lab, Advisor of NAPS (News & Publication Society), Member of BIT Mesra Brand Management, Faculty Advisor IEI Student Chapter (ECE) BIT Mesra and Honorary Secretary of IETE Ranchi Centre. He is the recipient of Viveka Nanda Techno Fiesta Award-2002, Young Scientist Award-2004, CCSN Best Paper Award-2013, First Prize in IEI Technical Contest-2013, and Cadence Design Contest-2014, 2016. His research interests include microelectronics, nanoelectronics, analog, digital, mixed CMOS VLSI circuits, low power VLSI circuits, ultra low power CMOS temperature sensor, ADC, DAC, PTAT, CMOS bandgap voltage reference, ASICs, Embedded Systems Designs, Smart Cardiac Pacemaker, Smart Grids, Internet of Things, and early stage cancer detection. He has to his credit around 150 publications in reputed Scopus & SCI journals, Scopus books and conferences. He has successfully completed two R&D projects funded by DST New Delhi jointly with DRDL Hyderabad and MHRD New Delhi, and the third project is in ongoing stage funded by RESPOND SAC ISRO Ahmadabad, Government of India. He has developed VLSI Design course under Developing Suitable Pedagogical Methods for Various Classes, Intellectual Calibres & Research in E-learning sponsored by Ministry of Human Resource Development Government of India. Now the complete course is available in IIT Kharagpur official website and open for all IITs, NITs, BITs and technical universities of India & abroad. He is the resource person of 16 Winter & Summer School on Digital VLSI Design. He is the program coordinator and resource person of one day seminar/workshop on Electronic System Design & Manufacturing (ESDM), East Zone of India funded by MHRD New Delhi under the aegis of IETE New Delhi. He has conducted 15 ESDM workshops in IITs NITs, BITs and other university/college of India in FY2015-16. He is the Editor of four books Proceeding of International Conference on Nanoelectronics Circuits & Communication Systems (NCCS-2015) & NCCS-2017 and Proceeding of International Conference on Microelectronics Computing & Communication Systems (MCCS-2015) & MCCS-2018 published in Scopus book series: Lecture Notes of Electrical Engineering, Springer. He is a member of several professional societies and academic bodies including IETE, ISTE, ISVE and IEEE.

Prof. J.K. Mandal received his M.Sc. in Physics from Jadavpur University in 1986 and M.Tech. in Computer Science from the University of Calcutta, and was awarded a Ph.D. in Computer Science and Engineering by Jadavpur University in 2000. Currently, he is Professor of Computer Science and Engineering and was Dean of the Faculty of Engineering, Technology and Management, Kalyani University, West Bengal for two consecutive terms. He started his career as a lecturer at NERIST, Arunachal Pradesh in September 1988, and has 30 years' teaching and research experience. His areas of research include coding theory, data and network security, remote sensing and GIS based applications, data compression, error correction, visual cryptography, steganography, security in MANET, wireless networks and unify computing. He has been a life member of the Computer Society of India since 1992, CRSI since 2009, ACM since 2012, IEEE since 2013 and a fellow of IETE since 2012. He has chaired more than 60 sessions at various international conferences and delivered more than 60 expert/invited lectures during the last 5 years. He has acted as program chair of several international conferences and edited more than 30 proceedings volumes. He is a reviewer for various international journals and conferences and has published over 360 articles and 6 books. He is one of the editors for the Springer AISC and CCIS Series.

He has published more than 450 articles out of which 160 papers are published in the international journal. He has authored 7 books. 23 scholars were awarded Ph.D. degree under his supervision.

Dr. Vijay Nath 於1976年出生於印度戈拉克布爾（Gorakhpur, U.P.）。他於1998年和2001年分別在印度 DDU 戈拉克布爾大學獲得物理學學士學位和電子學碩士學位。他於1999年獲得 MMMUT 戈拉克布爾的 PGDCN (GM) 認證。2008年，他在與 CEERI-Pilani 合作的情況下，從 Dr. RML Avadh 大學法伊扎巴德獲得 VLSI 設計與技術的博士學位。從2000年到2001年，他在 CEERI Pilani 的 IC 設計組擔任專案實習生，指導老師為 K.S.Yadav 博士（高級科學家）。從2002年到2006年，他在 DDU 大學戈拉克布爾的電子系擔任教職。2006年，他加入印度比爾拉科技學院（Birla Institute of Technology Mesra Ranchi, JH）電子與通信工程系擔任教職。目前，他是嵌入式系統設計實驗室的負責教授，NAPS（新聞與出版協會）的顧問，BIT Mesra 品牌管理成員，BIT Mesra 電子與通信工程系 IEI 學生分會的教學顧問，以及 IETE 蘭契中心的名譽秘書。他曾獲得 Viveka Nanda Techno Fiesta 獎（2002年）、青年科學家獎（2004年）、CCSN 最佳論文獎（2013年）、IEI 技術比賽第一名（2013年）以及 Cadence 設計比賽（2014年、2016年）。他的研究興趣包括微電子學、納米電子學、類比、數位、混合 CMOS VLSI 電路、低功耗 VLSI 電路、超低功耗 CMOS 溫度感測器、ADC、DAC、PTAT、CMOS 帶隙電壓參考、ASIC、嵌入式系統設計、智慧心臟起搏器、智慧電網、物聯網以及早期癌症檢測。他在知名的 Scopus 和 SCI 期刊、Scopus 書籍和會議上發表了約150篇論文。他成功完成了兩個由新德里 DST 資助的研發專案，與海德拉巴的 DRDL 和新德里 MHRD 聯合進行，第三個專案目前正在進行中，由印度政府的 RESPOND SAC ISRO 阿默達巴德資助。他在印度人力資源發展部贊助的「為各類班級、智力水平和電子學習研究開發合適的教學方法」下開發了 VLSI 設計課程。現在完整的課程已在 IIT Kharagpur 官方網站上提供，並對所有 IIT、NIT、BIT 及國內外技術大學開放。他是16個冬季和夏季數位 VLSI 設計學校的資源人員。他是由新德里 MHRD 資助的印度東區電子系統設計與製造（ESDM）一日研討會/工作坊的計畫協調員和資源人員。他在2015-16財年於印度的 IIT、NIT、BIT 和其他大學/學院舉辦了15場 ESDM 工作坊。他是四本書的編輯，包括《國際會議論文集：納米電子電路與通信系統（NCCS-2015）和 NCCS-2017》以及《國際會議論文集：微電子計算與通信系統（MCCS-2015）和 MCCS-2018》，這些書籍均發表在 Scopus 書籍系列：電氣工程講義筆記，Springer。他是多個專業學會和學術機構的成員，包括 IETE、ISTE、ISVE 和 IEEE。

Prof. J.K. Mandal 於1986年在賈達夫普爾大學獲得物理學碩士學位，並在加爾各答大學獲得計算機科學碩士學位，於2000年獲得賈達夫普爾大學的計算機科學與工程博士學位。目前，他是計算機科學與工程的教授，並曾連續兩屆擔任西孟加拉邦卡利亞尼大學工程、技術與管理學院的院長。他於1988年9月在阿魯納恰爾邦的 NERIST 開始他的教學生涯，擁有30年的教學和研究經驗。他的研究領域包括編碼理論、數據與網絡安全、遙感與 GIS 應用、數據壓縮、錯誤更正、視覺密碼學、隱寫術、MANET 的安全性、無線網絡和統一計算。他自1992年以來是印度計算機學會的終身會員，自2009年以來是 CRSI 的會員，自2012年以來是 ACM 的會員，自2013年以來是 IEEE 的會員，並自2012年以來是 IETE 的院士。他在各種國際會議上主持了超過60個會議，並在過去5年中發表了超過60場專家/受邀演講。他擔任過多個國際會議的計畫主席，並編輯了超過30本會議論文集。他是多個國際期刊和會議的審稿人，已發表超過360篇文章和6本書籍。他是 Springer AISC 和 CCIS 系列的編輯之一。

他已發表超過450篇文章，其中160篇在國際期刊上發表。他著有7本書籍。在他的指導下，有23名學者獲得博士學位。