VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 – July 2, 2017, Revised Selected Papers (Communications in Computer and Information Science)
暫譯: VLSI 設計與測試：第 21 屆國際研討會 VDAT 2017，印度魯爾基，2017 年 6 月 29 日 – 7 月 2 日，修訂選擇論文（計算機與資訊科學通訊）
商品描述
This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017.
The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.
商品描述(中文翻譯)
本書是2017年6月/7月在印度魯爾基舉行的第21屆國際VLSI設計與測試研討會（VDAT 2017）的經過審稿的會議論文集。共提交了246篇論文，最終精選出48篇完整論文和27篇短文，這些論文經過仔細審查。論文被組織成以下主題部分：數位設計；類比/混合信號；VLSI測試；設備與技術；VLSI架構；新興技術與記憶體；系統設計；低功耗設計與測試；射頻電路；架構與CAD；以及設計驗證。
