3D Flash Memories
暫譯: 3D 快閃記憶體

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商品描述

This book walks the reader through the next step in the evolution of NAND flash memory technology, namely the development of 3D flash memories, in which multiple layers of memory cells are grown within the same piece of silicon.  It describes their working principles, device architectures, fabrication techniques and practical implementations, and highlights why 3D flash is a brand new technology.

After reviewing market trends for both NAND and solid state drives (SSDs), the book digs into the details of the flash memory cell itself, covering both floating gate and emerging charge trap technologies. There is a plethora of different materials and vertical integration schemes out there. New memory cells, new materials, new architectures (3D Stacked, BiCS and P-BiCS, 3D FG, 3D VG, 3D advanced architectures); basically, each NAND manufacturer has its own solution. Chapter 3 to chapter 7 offer a broad overview of how 3D can materialize. The 3D wave is impacting emerging memories as well and chapter 8 covers 3D RRAM (resistive RAM) crosspoint arrays. Visualizing 3D structures can be a challenge for the human brain: this is way all these chapters contain a lot of bird’s-eye views and cross sections along the 3 axes.

The second part of the book is devoted to other important aspects, such as advanced packaging technology (i.e. TSV in chapter 9) and error correction codes, which have been leveraged to improve flash reliability for decades.  Chapter 10 describes the evolution from legacy BCH to the most recent LDPC codes, while chapter 11 deals with some of the most recent advancements in the ECC field. Last but not least, chapter 12 looks at 3D flash memories from a system perspective.

Is 14nm the last step for planar cells? Can 100 layers be integrated within the same piece of silicon? Is 4 bit/cell possible with 3D? Will 3D be reliable enough for enterprise and datacenter applications? These are some of the questions that this book helps answering by providing insights into 3D flash memory design, process technology and applications.

商品描述(中文翻譯)

這本書引導讀者了解NAND快閃記憶體技術的下一步演進,即3D快閃記憶體的發展,其中多層記憶體單元在同一片矽晶片上生長。它描述了這些技術的工作原理、裝置架構、製造技術和實際應用,並強調為什麼3D快閃記憶體是一項全新的技術。

在回顧NAND和固態硬碟(SSDs)的市場趨勢後,這本書深入探討了快閃記憶體單元的細節,涵蓋了浮動閘極(floating gate)和新興的電荷陷阱(charge trap)技術。市場上有各種不同的材料和垂直整合方案。新的記憶體單元、新的材料、新的架構(3D堆疊、BiCS和P-BiCS、3D FG、3D VG、3D先進架構);基本上,每個NAND製造商都有自己的解決方案。第三章到第七章提供了3D實現的廣泛概述。3D浪潮也影響了新興記憶體,第八章涵蓋了3D RRAM(電阻式隨機存取記憶體)交叉點陣列。可視化3D結構對人腦來說可能是一個挑戰,因此這些章節包含了大量的鳥瞰圖和沿三個軸的橫截面圖。

本書的第二部分專注於其他重要方面,例如先進封裝技術(即第九章的TSV)和錯誤更正碼,這些技術已被利用來提高快閃記憶體的可靠性數十年。第十章描述了從傳統BCH到最新的LDPC碼的演變,而第十一章則處理ECC領域的一些最新進展。最後,第十二章從系統的角度探討3D快閃記憶體。

14nm是平面單元的最後一步嗎?是否可以在同一片矽晶片上整合100層?3D是否能實現每個單元4位元?3D是否足夠可靠以用於企業和數據中心應用?這些是本書幫助回答的一些問題,通過提供對3D快閃記憶體設計、製程技術和應用的見解。

作者簡介

Dr. Rino Micheloni is Fellow at Microsemi Corporation where he currently runs the Non-Volatile Memory Lab in Milan, with special focus on NAND Flash. Prior to joining Microsemi, he was Fellow at PMC-Sierra, working on NAND Flash characterization, LDPC, and NAND Signal Processing as part of the team developing Flash controllers for PCIe SSDs. Before that, he was with IDT (Integrated Device Technology) as Lead Flash Technologist, driving the architecture and design of the BCH engine in the world's 1st PCIe NVMe SSD controller. Early in his career, he led Flash design teams at STMicroelectronics, Hynix, Infineon, and Qimonda; during this time, he developed the industry's first MLC NOR device with embedded ECC technology and the industry's first MLC NAND with embedded BCH.

Rino is IEEE Senior Member, he has co-authored more than 50 publications, and he holds 240 patents worldwide (including 118 US patents). He received the STMicroelectronics Exceptional Patent Award in 2003 and 2004, and the Qimonda IP Award in 2007.

Rino has published the following books with Springer: Inside Solid State Drives (2013), Inside NAND Flash Memories (2010), Error Correction Codes for Non-Volatile Memories (2008), Memories in Wireless Systems (2008), and VLSI-Design of Non-Volatile Memories (2005).

作者簡介(中文翻譯)

Dr. Rino Micheloni 是 Microsemi Corporation 的研究員,目前在米蘭負責非揮發性記憶體實驗室,專注於 NAND Flash。在加入 Microsemi 之前,他曾是 PMC-Sierra 的研究員,專注於 NAND Flash 特性測試、LDPC 和 NAND 信號處理,並參與開發 PCIe SSD 的 Flash 控制器團隊。在此之前,他在 IDT(Integrated Device Technology)擔任首席 Flash 技術專家,負責全球首款 PCIe NVMe SSD 控制器的 BCH 引擎架構和設計。早期職業生涯中,他在 STMicroelectronics、Hynix、Infineon 和 Qimonda 領導 Flash 設計團隊;在此期間,他開發了業界首款具嵌入式 ECC 技術的 MLC NOR 裝置和業界首款具嵌入式 BCH 的 MLC NAND。

Rino 是 IEEE 高級會員,已共同撰寫超過 50 篇出版物,並在全球擁有 240 項專利(包括 118 項美國專利)。他於 2003 年和 2004 年獲得 STMicroelectronics 卓越專利獎,並於 2007 年獲得 Qimonda 知識產權獎。

Rino 與 Springer 出版了以下書籍:《Inside Solid State Drives》(2013)、《Inside NAND Flash Memories》(2010)、《Error Correction Codes for Non-Volatile Memories》(2008)、《Memories in Wireless Systems》(2008)和《VLSI-Design of Non-Volatile Memories》(2005)。