High Performance Integer Arithmetic Circuit Design on FPGA: Architecture, Implementation and Design Automation (Springer Series in Advanced Microelectronics)
暫譯: FPGA上高效整數運算電路設計:架構、實現與設計自動化(斯普林格先進微電子系列)
Ayan Palchaudhuri
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商品描述
This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary User Constraints File . The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students and professionals engaged in the domain of FPGA circuit optimization and implementation."
商品描述(中文翻譯)
本書描述了幾種算術數據通路、控制通路和偽隨機序列生成器電路的最佳化實現,旨在實現針對特定高端現場可編程閘陣列(FPGA)系列的高性能算術電路。它探討了這些電路的規則性、模組化、可級聯和位切片架構,通過在硬體描述語言(HDL)中直接實例化目標FPGA特定的原語。每個提出的架構都經過詳細的數學分析進行論證。同時,通過在Xilinx專有的用戶約束文件中提供相關的放置約束,將邏輯相關的硬體原語緊密放置在一起,進行電路構建塊的受限放置。本書涵蓋了一個名為FlexiCore的基於圖形用戶界面的計算機輔助設計(CAD)工具的實現,該工具與Xilinx集成軟體環境(ISE)集成,用於從用戶級規範自動化設計平台特定的高性能算術電路。此工具已用於實現所提出的電路,以及整數算術算法的硬體實現,其中幾個提出的電路被用作構建塊。實現結果顯示,所提出的電路在性能和操作數寬度可擴展性方面優於通過其他現有方法衍生的實現。本書將對從事FPGA電路優化和實現領域的研究人員、學生和專業人士提供幫助。