SRAM Architectures: Investigation & Analysis (Paperback)
暫譯: SRAM 架構:調查與分析 (平裝本)
Anuj Gupta
- 出版商: LAP LAMBERT
- 出版日期: 2012-07-16
- 售價: $2,150
- 貴賓價: 9.5 折 $2,043
- 語言: 英文
- 頁數: 60
- 裝訂: Paperback
- ISBN: 3659168459
- ISBN-13: 9783659168451
海外代購書籍(需單獨結帳)
買這商品的人也買了...
商品描述
CMOS digital ICs are enabling the technology for the modern information age. Digital systems handle large amounts of information at high speeds. Such products demand low-priced memories with low-power consumption, high-speed operation, high density, and small package size. The architecture of the memory structure has a considerable impact on the performance of the system. Over the years, technology advances have been driven by memory designs of higher and higher density. While designing SOC, system architects need to resolve a number of complex issues in high-performance system applications. However, one of the fundamental problems in these applications is Memories - the bottlenecks and challenges of system performance often reside in its memory architecture. Memory developers have to design memories to address the issues in bandwidth, latency, density, power and cost. Unfortunately, it is not possible for a single memory technology to address all these issues with distinct advantages. In this book an attempt is made to investigate various SRAM architectures for different applications and study of Deep Submicron Effects affecting functionality and design topology for SRAMs.
商品描述(中文翻譯)
CMOS 數位集成電路正在推動現代資訊時代的技術。數位系統以高速度處理大量資訊。這類產品需要低成本、低功耗、高速度運作、高密度及小包裝尺寸的記憶體。記憶體結構的架構對系統性能有相當大的影響。多年來,技術進步是由於記憶體設計的密度不斷提高。在設計系統單晶片 (SOC) 時,系統架構師需要解決許多高性能系統應用中的複雜問題。然而,在這些應用中,一個基本問題是記憶體 - 系統性能的瓶頸和挑戰往往存在於其記憶體架構中。記憶體開發者必須設計記憶體以解決帶寬、延遲、密度、功耗和成本等問題。不幸的是,單一的記憶體技術無法以明顯的優勢解決所有這些問題。本書試圖探討不同應用的各種 SRAM 架構,並研究影響 SRAM 功能和設計拓撲的深亞微米效應。