Formal Verification of Floating-Point Hardware Design: A Mathematical Approach
暫譯: 浮點硬體設計的形式驗證:數學方法
David M. Russinoff
- 出版商: Springer
- 出版日期: 2018-10-22
- 售價: $3,840
- 貴賓價: 9.5 折 $3,648
- 語言: 英文
- 頁數: 382
- 裝訂: Hardcover
- ISBN: 3319955128
- ISBN-13: 9783319955124
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其他版本:
Formal Verification of Floating-Point Hardware Design: A Mathematical Approach (Hardcover)
相關主題
商品描述
This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies.
The book consists of five parts, the first two of which present a rigorous exposition of the general theory based on the first principles of arithmetic. Part I covers bit vectors and the bit manipulation primitives, integer and fixed-point encodings, and bit-wise logical operations. Part II addresses the properties of floating-point numbers, the formats in which they are encoded as bit vectors, and the various modes of floating-point rounding. In Part III, the theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations. As a basis for the formal verification of such implementations, Part IV contains high-level specifications of correctness of the basic arithmetic instructions of several major industry-standard floating-point architectures, including all details pertaining to the handling of exceptional conditions. Part V illustrates the methodology, applying the preceding theory to the comprehensive verification of a state-of-the-art commercial floating-point unit.
All of these results have been formalized in the logic of the ACL2 theorem prover and mechanically checked to ensure their correctness. They are presented here, however, in simple conventional mathematical notation. The book presupposes no familiarity with ACL2, logic design, or any mathematics beyond basic high school algebra. It will be of interest to verification engineers as well as arithmetic circuit designers who appreciate the value of a rigorous approach to their art, and is suitable as a graduate text in computer arithmetic.
商品描述(中文翻譯)
這是第一本專注於通過數學方法確保浮點硬體設計正確性的書籍。浮點硬體設計的形式驗證 提出了基於統一的寄存器傳輸邏輯和浮點運算理論的驗證方法論,這一理論在過去二十多年中被開發並應用於商業浮點單元的形式驗證,作者在多家主要微處理器設計公司工作期間進行了這些研究。
本書由五個部分組成,前兩部分對基於算術基本原理的一般理論進行了嚴謹的闡述。第一部分涵蓋了位向量和位操作原語、整數和定點編碼以及按位邏輯運算。第二部分探討了浮點數的特性、它們作為位向量編碼的格式以及各種浮點舍入模式。在第三部分中,理論擴展到對幾種算法和優化技術的分析,這些技術通常用於商業實現的基本算術運算。作為這些實現形式驗證的基礎,第四部分包含了幾個主要行業標準浮點架構的基本算術指令正確性的高級規範,包括處理異常條件的所有細節。第五部分則展示了該方法論,將前述理論應用於對一個最先進的商業浮點單元的全面驗證。
所有這些結果都已在ACL2定理證明器的邏輯中形式化,並經過機械檢查以確保其正確性。然而,這裡以簡單的傳統數學符號呈現。本書不假設讀者對ACL2、邏輯設計或任何超出基本高中代數的數學有任何熟悉程度。它將吸引驗證工程師以及欣賞嚴謹方法對其藝術價值的算術電路設計師,並適合作為計算機算術的研究生教材。