System Level ESD Protection (系統級靜電放電保護)
Vashchenko, Vladislav, Scholz, Mirko
- 出版商: Springer
- 出版日期: 2016-09-03
- 定價: $4,300
- 售價: 8.0 折 $3,440
- 語言: 英文
- 頁數: 320
- 裝訂: Quality Paper - also called trade paper
- ISBN: 3319348922
- ISBN-13: 9783319348926
-
相關翻譯:
系統與芯片 ESD 防護的協同設計 (簡中版)
-
其他版本:
System Level Esd Protection (Hardcover)
立即出貨 (庫存=1)
買這商品的人也買了...
-
$4,420$4,199 -
$1,580$1,568
相關主題
商品描述
This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations.
商品描述(中文翻譯)
本書探討與系統級靜電放電(ESD)保護相關的模擬集成電路和系統設計的關鍵方面。對於開發片上系統(SoC)和封裝系統(SoP)並與系統級ESD保護集成的任何人來說,這是一本寶貴的參考資料。本書專注於具有嵌入式片上系統級保護的半導體集成電路(IC)元件的設計和IC-系統共同設計。讀者將能夠將系統級ESD保護解決方案提升到集成電路的水平,從而減少或完全消除印刷電路板(PCB)上的額外離散元件的需求,並滿足系統級ESD要求。作者採用系統化的方法,基於IC-系統ESD保護共同設計。提供了可用的IC級ESD測試方法的詳細描述,並討論了IC級和系統級ESD測試方法之間的相關性。通過代表性案例研究,演示了IC級ESD保護設計,並使用各種數值模擬和ESD測試進行分析。將IC-系統ESD共同設計的整體方法論作為一個逐步程序呈現,其中包括ESD測試和數值模擬。
作者簡介
Dr. Vladislav Vashchenko is Director of ESD group at Maxim Integrated Corp responsible for major ESD development aspects across the entire $2.4B enterprise. During previous decade he was leading the ESD group at National Semiconductor Corp. and the decade till then he was a key contributor in reliability department of SRI "Pulsar"(Moscow). He received MS, Engineer-Physicist and "Ph.D. in Physics of Semiconductors" from Moscow Institute of Physics and Technology (1990) and "Doctor of Science in Microelectronics" degree (1997). He is author of over 140 U.S. patents and over 100 papers in the field, co-author of books "Physical Limitation of Semiconductor Devices" (2008) and "ESD Design for Analog Circuits" (2010, ).
Mirko Scholz received the degree "Diplomingenieur (FH)" from the University of Applied Sciences in Zwickau (Germany) in 2005 and the PhD degree in Electrical Engineering from the Vrije Universiteit in Brussels (VUB) in 2013. In April 2005 he joined the imec ESD team as ESD researcher where he authored and coauthored more than 70 publications, tutorials and patents in the field of ESD reliability and ESD testing. Since 2007, he has been a member of the Device Testing Working Groups of the ESDA standards committee where he currently chairs working group 5.6 (Human Metal Model).
作者簡介(中文翻譯)
Dr. Vladislav Vashchenko是Maxim Integrated Corp的ESD部門主管,負責整個價值24億美元企業的主要ESD開發工作。在之前的十年中,他曾在National Semiconductor Corp.領導ESD部門。在此之前的十年中,他是莫斯科SRI“Pulsar”的可靠性部門的重要貢獻者。他在莫斯科物理技術學院獲得了碩士學位、工程物理學家學位和“半導體物理學博士”學位(1990年),並在1997年獲得了“微電子科學博士”學位。他是超過140項美國專利和100多篇論文的作者,也是《半導體器件的物理限制》(2008年)和《模擬電路的ESD設計》(2010年)的合著者。
Mirko Scholz於2005年在德國茨瓦考應用科學大學獲得“Diplomingenieur(FH)”學位,並於2013年在布魯塞爾自由大學(VUB)獲得電機工程博士學位。2005年4月,他加入imec的ESD團隊擔任ESD研究員,並在ESD可靠性和ESD測試領域撰寫和合著了70多篇出版物、教程和專利。自2007年以來,他一直是ESDA標準委員會的器件測試工作組成員,目前擔任5.6號工作組(人體金屬模型)的主席。