On-Chip Training Npu - Algorithm, Architecture and Soc Design
暫譯: 片上訓練NPU - 演算法、架構與系統單晶片設計
Han, Donghyeon, Yoo, Hoi-Jun
- 出版商: Springer
- 出版日期: 2024-07-29
- 售價: $4,100
- 貴賓價: 9.5 折 $3,895
- 語言: 英文
- 頁數: 237
- 裝訂: Quality Paper - also called trade paper
- ISBN: 3031342399
- ISBN-13: 9783031342394
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相關分類:
Algorithms-data-structures
海外代購書籍(需單獨結帳)
商品描述
Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.
商品描述(中文翻譯)
與大多數專注於深度神經網絡（DNN）推理的可用資源不同，本書為讀者提供了一個關於設備上DNN訓練半導體和系統單晶片（SoC）設計的需求、要求和挑戰的單一參考來源。作者涵蓋了設備上DNN訓練的發展趨勢和歷史，以及設備上訓練半導體和SoC設計的範例，以促進理解。
作者簡介
Donghyeon Han (S'17) received the B.S., M.S., and Ph.D. degrees from the school of electrical engineering of Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 2017, 2019 and 2023, respectively. He is now the postdoctoral associate at Massachusetts Institute of Technology (MIT).
His current research interests include low-power system-on-chip design, especially focused on on-device deep neural network training accelerators and hardware-friendly deep learning algorithms. His Ph. D research resulted in several publications in ISSCC, SoVC, JSSC, TCAS-I, IEEE Micro, AICAS, Hotchips, and Coolchips.
Hoi-Jun Yoo is the KAIST ICT Endowed Chair Professor, School of Electrical Engineering, KAIST. He was the VCSEL pioneer in Bell Communications Research at Red Bank, NJ. USA and Manager of DRAM design group at Hyundai Electronics designing from 1M DRAM to 256M SDRAM.
Currently, he is a full professor of Department of Electrical Engineering atKAIST and the director of the System Design Innovation and Application Research Center (SDIA). From 2003 to 2005, he served as the full time Advisor to the Minister of Korean Ministry of Information and Communication for SoC and Next Generation Computing. His current research interests are Bio Inspired IC Design, Network on a Chip, Multimedia SoC design, Wearable Healthcare Systems, and high speed and low power memory. He has published more than 250 papers, and wrote or edited 5 books, "DRAM Design"(1997, Hongneung), "High Performance DRAM"(1999 Hongneung), "Low Power NoC for High Performance SoC Design"(2008, CRC), "Mobile 3D Graphics SoC"(2010, Wiley), and "BioMedical CMOS ICs"(Co-editing with Chris Van Hoof, 2010, Springer), and many chapters of books.
Dr. Yoo received Order of Service Merit from Korean government in 2011 for his contribution to Korean memory industry, Scientist/Engineer of this month Award from Ministry of Education, Science and Technology of Korea in 2010, Best Scholarship Awards of KAIST in 2011. He also received the Electronic Industrial Association of Korea Award for his contribution to DRAM technology in 1994, Hynix Development Award in 1995, the Korea Semiconductor Industry Association Award in 2002, Best Research of KAIST Award in 2007, and has been co-recipients of ASP-DAC Design Award 2001, Outstanding Design Awards of 2005, 2006, 2007, 2010, 2011, 2014 A-SSCC, Student Design Contest Award of 2007, 2008, 2010, 2011 DAC/ISSCC. He has served as a member of the executive committee of ISSCC, Symposium on VLSI, and A-SSCC. He also served as the IEEE SSCS Distinguished Lecturer ('10-'11) and the TPC chairs of ISSCC 2015, ISWC 2010 and A-SSCC 2008. He is an IEEE Fellow.
作者簡介(中文翻譯)
董賢翰（S'17）於2017年、2019年和2023年分別獲得韓國科學技術院（KAIST）電機工程學院的學士、碩士和博士學位。他目前是麻省理工學院（MIT）的博士後研究員。
他目前的研究興趣包括低功耗系統單晶片設計，特別專注於設備內深度神經網絡訓練加速器和硬體友好的深度學習算法。他的博士研究在ISSCC、SoVC、JSSC、TCAS-I、IEEE Micro、AICAS、Hotchips和Coolchips等期刊上發表了多篇論文。
兪會俊是KAIST電機工程學院的ICT講座教授。他曾是美國新澤西州紅銀行貝爾通訊研究所的VCSEL先驅，並擔任現代電子的DRAM設計小組經理，負責從1M DRAM到256M SDRAM的設計。
目前，他是KAIST電機工程系的正教授，並擔任系統設計創新與應用研究中心（SDIA）的主任。從2003年到2005年，他擔任韓國資訊通信部的全職顧問，專注於系統單晶片（SoC）和下一代計算。他目前的研究興趣包括生物啟發的IC設計、片上網路、媒體系統單晶片設計、可穿戴健康系統，以及高速和低功耗記憶體。他已發表超過250篇論文，並撰寫或編輯了5本書籍，包括《DRAM設計》（1997年，弘陵）、《高效能DRAM》（1999年，弘陵）、《高效能SoC設計的低功耗NoC》（2008年，CRC）、《行動3D圖形SoC》（2010年，Wiley）和《生醫CMOS IC》（與Chris Van Hoof共同編輯，2010年，Springer），以及多本書籍的章節。
兪博士於2011年因對韓國記憶體產業的貢獻獲得韓國政府的服務功勳勳章，並於2010年獲得韓國教育科學技術部的本月最佳科學家/工程師獎，2011年獲得KAIST最佳獎學金獎。他還於1994年因對DRAM技術的貢獻獲得韓國電子工業協會獎，1995年獲得Hynix發展獎，2002年獲得韓國半導體產業協會獎，2007年獲得KAIST最佳研究獎，並共同獲得2001年ASP-DAC設計獎、2005、2006、2007、2010、2011年A-SSCC傑出設計獎、2007、2008、2010、2011年DAC/ISSCC學生設計比賽獎。他曾擔任ISSCC、VLSI研討會和A-SSCC的執行委員會成員，並擔任IEEE SSCS傑出講師（'10-'11）及ISSCC 2015、ISWC 2010和A-SSCC 2008的TPC主席。他是IEEE Fellow。
