In-Memory Computing Hardware Accelerators for Data-Intensive Applications

Mohammad, Baker, Halawani, Yasmin

  • 出版商: Springer
  • 出版日期: 2024-09-27
  • 售價: $3,680
  • 貴賓價: 9.5$3,496
  • 語言: 英文
  • 頁數: 143
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 3031342356
  • ISBN-13: 9783031342356
  • 海外代購書籍(需單獨結帳)

相關主題

商品描述

This book describes the state-of-the-art of technology and research on In-Memory Computing Hardware Accelerators for Data-Intensive Applications. The authors discuss how processing-centric computing has become insufficient to meet target requirements and how Memory-centric computing may be better suited for the needs of current applications. This reveals for readers how current and emerging memory technologies are causing a shift in the computing paradigm. The authors do deep-dive discussions on volatile and non-volatile memory technologies, covering their basic memory cell structures, operations, different computational memory designs and the challenges associated with them. Specific case studies and potential applications are provided along with their current status and commercial availability in the market.

商品描述(中文翻譯)

本書描述了針對數據密集型應用的內存計算硬體加速器的最新技術和研究狀態。作者討論了以處理為中心的計算如何不足以滿足目標需求,以及以內存為中心的計算可能更適合當前應用的需求。這揭示了當前和新興的內存技術如何引發計算範式的轉變。作者深入探討了揮發性和非揮發性內存技術,涵蓋了它們的基本內存單元結構、操作、不同的計算內存設計及其相關挑戰。書中提供了具體的案例研究和潛在應用,並介紹了它們在市場上的當前狀態和商業可用性。

作者簡介

Baker Mohammad is the director of System on Chip center and professor of EECS at Khalifa University. Dr. Mohammad is a senior member of IEEE and a member of the Mohammed bin Rashid Academy of Scientists. Prior to joining Khalifa University, he was a Senior Staff Engineer/Manager at Qualcomm, Austin, Tx, USA, for 6-years, where he was engaged in designing high-performance and low-power DSP processors used for communication and multi-media application. Before joining Qualcomm, he worked for 10 years at Intel Corporation on a wide range of microprocessors design from high-performance, server chips > 100Watt (IA-64), to mobile embedded processor low power sub 1 watt (xscale). He has over 16 years of industrial experience in microprocessor design, emphasizing memory, low power circuit, and physical design. Baker earned his Ph.D. from the University of Texas at Austin in 2008, his M.S. degree from Arizona State University, Tempe, and BS degree from the University of New Mexico, Albuquerque, all in ECE. His research interests include VLSI, power-efficient computing, embedded memory and in-memory computing, neuromorphic computing, emerging technology such as Memristor, STTRAM, hardware accelerators for Cyber-Physical Systems and AI. He is also engaged in a microwatt range computing platform for wearable electronics and WSN focusing on energy harvesting, power management, and power conversion, including efficient dc/dc, ac/dc converters. Baker authored/co-authored over 200 referred journals and conference proceedings, >3 books, >18 US patents, multiple invited seminars/panelists, and the presenter of >3 conference tutorials, including one tutorial on Energy harvesting and Power management for WSN at the 2015 (ISCAS). Baker is an associate editor for IEEE Access, IEEE Transaction on VLSI (TVLSI), and Scientific Reports journals. Dr Mohammad participates in many technical committees at IEEE conferences and reviews for TVLSI, IEEE Circuits and Systems journals. He has received several awards, including the KUSTAR staff excellence award in intellectual property creation, IEEE TVLSI best paper award, 2016 IEEE MWSCAS Myrill B. Reed best paper award, Qualcomm Qstar award for excellence on performance and leadership. SRC Techon best session papers for 2016 and 2017. 2009 Best paper award for Qualcomm Qtech conference and Intel Involve in the community award for volunteer and impact on the community.

Yasmin Halawani is a Postdoctoral Fellow at Khalifa University in Abu Dhabi, UAE.


作者簡介(中文翻譯)

巴克·穆罕默德(Baker Mohammad)是卡利法大學(Khalifa University)系統單晶片中心的主任及電子工程與計算機科學(EECS)教授。穆罕默德博士是IEEE的資深會員及穆罕默德·本·拉希德科學家學院的成員。在加入卡利法大學之前,他在美國德克薩斯州奧斯丁的高通(Qualcomm)擔任高級員工工程師/經理,工作了六年,專注於設計用於通信和多媒體應用的高效能低功耗數位信號處理器。在加入高通之前,他在英特爾公司(Intel Corporation)工作了十年,參與設計各種微處理器,從高效能伺服器晶片(超過100瓦特,IA-64)到低功耗的行動嵌入式處理器(低於1瓦特,xscale)。他在微處理器設計方面擁有超過16年的產業經驗,專注於記憶體、低功耗電路和物理設計。巴克於2008年在德克薩斯大學奧斯丁分校獲得博士學位,並在亞利桑那州立大學(Arizona State University)獲得碩士學位,在新墨西哥大學(University of New Mexico)獲得學士學位,皆為電子與計算機工程(ECE)領域。他的研究興趣包括超大規模集成電路(VLSI)、節能計算、嵌入式記憶體及內存計算、類神經計算、新興技術如記憶電阻(Memristor)、STTRAM、針對網路物理系統(Cyber-Physical Systems)和人工智慧(AI)的硬體加速器。他還參與微瓦級計算平台的研究,專注於可穿戴電子產品和無線感測網路(WSN)的能量收集、電源管理和電源轉換,包括高效的直流/直流和交流/直流轉換器。巴克已發表或共同發表超過200篇被引用的期刊和會議論文,超過3本書籍,超過18項美國專利,並多次受邀擔任研討會講者及小組成員,還曾在2015年ISCAS會議上進行有關無線感測網路的能量收集和電源管理的教程。巴克是IEEE Access、IEEE VLSI期刊(TVLSI)及Scientific Reports期刊的副編輯。穆罕默德博士參與多個IEEE會議的技術委員會,並為TVLSI及IEEE電路與系統期刊進行審稿。他獲得多項獎項,包括KUSTAR知識產權創造卓越獎、IEEE TVLSI最佳論文獎、2016年IEEE MWSCAS Myrill B. Reed最佳論文獎、高通Qstar卓越表現與領導獎、2016及2017年SRC Techon最佳會議論文獎、2009年高通Qtech會議最佳論文獎及英特爾社區參與獎,以表彰其志願服務及對社區的影響。

雅斯敏·哈拉瓦尼(Yasmin Halawani)是阿布達比卡利法大學的博士後研究員。