Efficient Execution of Irregular Dataflow Graphs: Hardware/Software Co-Optimization for Probabilistic AI and Sparse Linear Algebra

Shah, Nimish, Meert, Wannes, Verhelst, Marian

  • 出版商: Springer
  • 出版日期: 2024-07-15
  • 售價: $2,520
  • 貴賓價: 9.5$2,394
  • 語言: 英文
  • 頁數: 143
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 3031331389
  • ISBN-13: 9783031331381
  • 相關分類: 人工智慧線性代數 Linear-algebra
  • 海外代購書籍(需單獨結帳)

相關主題

商品描述

This book focuses on the acceleration of emerging irregular sparse workloads, posed by novel artificial intelligent (AI) models and sparse linear algebra. Specifically, the book outlines several co-optimized hardware-software solutions for a highly promising class of emerging sparse AI models called Probabilistic Circuit (PC) and a similar sparse matrix workload for triangular linear systems (SpTRSV). The authors describe optimizations for the entire stack, targeting applications, compilation, hardware architecture and silicon implementation, resulting in orders of magnitude higher performance and energy-efficiency compared to the existing state-of-the-art solutions. Thus, this book provides important building blocks for the upcoming generation of edge AI platforms.

商品描述(中文翻譯)

本書專注於加速新興的非規則稀疏工作負載,這些工作負載是由新型人工智慧(AI)模型和稀疏線性代數所引發的。具體而言,本書概述了幾種針對一類極具潛力的新興稀疏AI模型——稱為Probabilistic Circuit(PC)以及類似的稀疏矩陣工作負載(SpTRSV)——的協同優化硬體-軟體解決方案。作者描述了針對整個技術堆疊的優化,涵蓋應用程式、編譯、硬體架構和矽實現,最終實現了比現有最先進解決方案高出數個量級的性能和能效。因此,本書為即將到來的邊緣AI平台提供了重要的基礎構件。

作者簡介

Nimish Shah is an Electrical Engineering PhD student at KU Leuven, Belgium, advised by Prof. Marian Verhelst. His research focuses on hardware-software co-optimization for the energy-efficient acceleration of machine learning, sparse algebra, and graph workloads. Prior to debuting his doctoral studies, Mr. Shah was an ASIC engineer in a GPU design team at Nvidia, Bengaluru, India, working on data (de)compression hardware. He received an M.Tech in Electronic Systems Design from the Indian Institute of Science, and a B.Tech in Electronics Engineering from S.V. National Institute of Technology, Surat, India. Mr. Shah is a recipient of the HiSilicon Sponsorship Grant for MPW Prototyping, the ISSCC Code-a-Chip Travel Grant Award 2023, and the student travel grant for the IEEE/ACM MICRO 2022 conference. His research contributed to a joint project with Intel that won the "Intel 2021 Outstanding Researcher Award". He is also the recipient of the DESE Design Medal for excellence in his master's studies and thesis work at IISc, and was selected as a fellow for the undergraduate engineering stream under the prestigious Kishore Vaigyanik Protsahan Yojana (KVPY) 2010 of the Government of India.

Wannes Meert received his degrees of Master of Electrotechnical Engineering, Micro-electronics (2005), Master of Artificial Intelligence (2006) and Ph.D. in Computer Science (2011) from KU Leuven. He is an IOF research manager in the DTAI section at KU Leuven. His work is focused on applying machine learning, artificial intelligence and anomaly detection technology to industrial application domains with various industrial and academic partners..

Marian Verhelst is a full professor at the MICAS laboratories of KU Leuven and a research director at imec. Her research focuses on embedded machine learning, hardware accelerators, HW-algorithm co-design and low-power edge processing. She received a PhD from KU Leuven in 2008, and worked as a research scientist at Intel Labs, Hillsboro OR from 2008 till 2010. Marian is a member of the board of directors of tinyML and active in the TPC's of DATE, ISSCC, VLSI and ESSCIRC, was the chair of tinyML2021 and TPC co-chair of AICAS2020. Marian is an IEEE SSCS Distinguished Lecturer, was a member of the Young Academy of Belgium, an associate editor for TVLSI, TCAS-II and JSSC and a member of the STEM advisory committee to the Flemish Government. Marian received the laureate prize of the Royal Academy of Belgium in 2016, the 2021 Intel Outstanding Researcher Award, and the André Mischke YAE Prize for Science and Policy in 2021.

作者簡介(中文翻譯)

Nimish Shah 是比利時 KU Leuven 的電機工程博士生,指導教授為 Marian Verhelst 教授。他的研究專注於硬體與軟體的共同優化,以實現機器學習、稀疏代數和圖形工作負載的能源高效加速。在開始博士學業之前,Shah 先生曾在印度班加羅爾的 Nvidia GPU 設計團隊擔任 ASIC 工程師,負責數據(解)壓縮硬體的工作。他在印度科學院獲得電子系統設計的碩士學位,並在印度蘇拉特的 S.V. National Institute of Technology 獲得電子工程的學士學位。Shah 先生獲得了 HiSilicon MPW 原型製作贊助獎、2023 年 ISSCC Code-a-Chip 旅行獎以及 IEEE/ACM MICRO 2022 會議的學生旅行獎。他的研究貢獻於與 Intel 的聯合項目,該項目獲得了「Intel 2021 傑出研究者獎」。他還因在印度科學院的碩士學業和論文工作中表現優異而獲得 DESE 設計獎章,並於 2010 年被選為印度政府的 Kishore Vaigyanik Protsahan Yojana (KVPY) 本科工程流的獎學金得主。

Wannes Meert 獲得了 KU Leuven 的電氣工程碩士(微電子,2005)、人工智慧碩士(2006)和計算機科學博士(2011)學位。他是 KU Leuven DTAI 部門的 IOF 研究經理。他的工作專注於將機器學習、人工智慧和異常檢測技術應用於各種工業應用領域,並與多個工業和學術夥伴合作。

Marian Verhelst 是 KU Leuven MICAS 實驗室的正教授及 imec 的研究主任。她的研究專注於嵌入式機器學習、硬體加速器、硬體-演算法共同設計和低功耗邊緣處理。她於 2008 年在 KU Leuven 獲得博士學位,並於 2008 年至 2010 年在美國俄勒岡州希爾斯伯勒的 Intel Labs 擔任研究科學家。Marian 是 tinyML 董事會成員,並活躍於 DATE、ISSCC、VLSI 和 ESSCIRC 的技術程序委員會,曾擔任 tinyML2021 的主席和 AICAS2020 的技術程序委員會共同主席。Marian 是 IEEE SSCS 傑出講者,曾是比利時青年學院的成員,並擔任 TVLSI、TCAS-II 和 JSSC 的副編輯,以及佛蘭德政府 STEM 諮詢委員會的成員。Marian 在 2016 年獲得比利時皇家學院的獎學金,2021 年獲得 Intel 傑出研究者獎,並於 2021 年獲得安德烈·米施克科學與政策獎。