On-Chip Networks (Paperback)

Li-Shiuan Peh, Natalie Enright Jerger

  • 出版商: Morgan & Claypool
  • 出版日期: 2009-07-24
  • 售價: $1,570
  • 貴賓價: 9.5$1,492
  • 語言: 英文
  • 頁數: 142
  • 裝訂: Paperback
  • ISBN: 1598295845
  • ISBN-13: 9781598295849
  • 海外代購書籍(需單獨結帳)

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With the ability to integrate a large number of cores on a single chip, research into on-chip networks to facilitate communication becomes increasingly important. On-chip networks seek to provide a scalable and high-bandwidth communication substrate for multi-core and many-core architectures. High bandwidth and low latency within the on-chip network must be achieved while fitting within tight area and power budgets. In this lecture, we examine various fundamental aspects of on-chip network design and provide the reader with an overview of the current state-of-the-art research in this field. Table of Contents: Introduction / Interface with System Architecture / Topology / Routing / Flow Control / Router Microarchitecture / Conclusions