Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
暫譯: 間隔工程化FinFET架構:高效能數位電路應用

Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal

  • 出版商: CRC
  • 出版日期: 2017-06-06
  • 售價: $6,050
  • 貴賓價: 9.5$5,748
  • 語言: 英文
  • 頁數: 154
  • 裝訂: Hardcover
  • ISBN: 1498783597
  • ISBN-13: 9781498783590
  • 海外代購書籍(需單獨結帳)

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商品描述

This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

商品描述(中文翻譯)

本書專注於新型MOS基礎元件與電路共同設計在20納米以下技術節點的間隔工程方面,探討其製程複雜性、變異性及可靠性問題。它全面探討了FinFET/三閘極架構及其在電路/SRAM中的適用性和對隨機統計變異的容忍度。