A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits and Systems (Paperback)
暫譯: Verilog-A 實用指南:掌握模擬設備、電路與系統的建模語言

Mijalkovic, Slobodan

  • 出版商: Apress
  • 出版日期: 2022-09-15
  • 售價: $2,320
  • 貴賓價: 9.5$2,204
  • 語言: 英文
  • 頁數: 300
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 1484263502
  • ISBN-13: 9781484263501
  • 相關分類: Verilog
  • 立即出貨 (庫存 < 3)

買這商品的人也買了...

相關主題

商品描述

Discover how Verilog-A is particularly designed to describe behavior and connectivity of circuits and system components for analog SPICE-class simulators, or for continuous time (SPICE-based) kernels in Verilog-AMS simulators. With continuous updates since it's release 30 years ago, this practical guide provides a comprehensive foundation and understanding to the modeling language in its most recent standard formulation.
With the introduction of language extensions to support compact device modeling, the Verilog-A has become today de facto standard language in the electronics industry for coding compact models of active and passive semiconductor devices. You'll gain an in depth look at how analog circuit simulators work, solving system equations, modeling of components from other physical domains, and modeling the same physical circuits and systems at various levels of detail and at different levels of abstraction.

All industry standard compact models released by Si2 Compact Model Coalition (CMC) as well as compact models of emerging nano-electronics devices released by New Era Electronic Devices and Systems (NEEDS) initiative are coded in Verilog-A. This book prepares you for the current trends in the neuromorphic computing, hardware customization for artificial intelligence applications as well as circuit design for internet of things (IOT) will only increase the need for analog simulation modeling and make Verilog-A even more important as a multi-domain component-oriented modeling language.
Let A Practical Guide to Verilog-A be the initial step in learning the extended mixed-signal Verilog-AMS hardware description language.
What You'll Learn

  • Review the hardware description and modeling language Verilog-A in its most recent standard formulation.
  • Code new compact models of active and passive semiconductor devices as well as new models for emerging circuit components from different physical disciplines.
  • Extend the application of SPICE-like circuit simulators to non-electronics field (neuromorphic, thermal, mechanical, etc systems).
  • Apply the initial steps towards the extended mixed-signal Verilog-AMS hardware description language.

Who This Book Is For
Electronic circuit designers and SPICE simulation model developers in academia and industry. Developers of electronic design automation (EDA) tools. Engineers, scientists and students of various disciplines using SPICE-like simulators for research and development.

商品描述(中文翻譯)

了解 Verilog-A 如何專門設計用於描述電路和系統元件的行為及連接,適用於類比 SPICE 類模擬器,或用於 Verilog-AMS 模擬器中的連續時間 (SPICE 基礎) 核心。自 30 年前發布以來持續更新的這本實用指南,提供了對該建模語言在其最新標準形式中的全面基礎和理解。

隨著語言擴展的引入以支持緊湊設備建模,Verilog-A 現已成為電子產業中編碼主動和被動半導體設備緊湊模型的事實標準語言。您將深入了解類比電路模擬器的運作方式、系統方程的求解、來自其他物理領域的元件建模,以及在不同細節層次和不同抽象層次下建模相同的物理電路和系統。

所有由 Si2 Compact Model Coalition (CMC) 發布的行業標準緊湊模型,以及由 New Era Electronic Devices and Systems (NEEDS) 計劃發布的新興納米電子設備的緊湊模型,均以 Verilog-A 編碼。本書為您準備了當前在神經形態計算、人工智慧應用的硬體定制以及物聯網 (IOT) 的電路設計等趨勢,這些都將增加對類比模擬建模的需求,並使 Verilog-A 作為多領域元件導向建模語言變得更加重要。

A Practical Guide to Verilog-A 成為學習擴展混合信號 Verilog-AMS 硬體描述語言的第一步。

您將學到什麼


  • 回顧硬體描述和建模語言 Verilog-A 在其最新標準形式中的內容。

  • 編碼主動和被動半導體設備的新緊湊模型,以及來自不同物理學科的新電路元件模型。

  • 將 SPICE 類電路模擬器的應用擴展到非電子領域(神經形態、熱、機械等系統)。

  • 應用擴展混合信號 Verilog-AMS 硬體描述語言的初步步驟。

本書適合誰閱讀

電子電路設計師和學術界及業界的 SPICE 模擬模型開發者。電子設計自動化 (EDA) 工具的開發者。使用 SPICE 類模擬器進行研究和開發的各學科工程師、科學家和學生。

作者簡介

Dr. Slobodan Mijalkovic is a Senior R&D Engineer at Silvaco, Inc., specialized in semiconductor device and integrated circuit modeling for electronic design automation (EDA) software tools. Before joining Silvaco Europe, he was a Principal Researcher in HiTeC Laboratory at Delft University of Technology in the Netherlands, where he led a team for standardization of the Mextram bipolar transistor model with Compact Model Coalition (CMC). Formerly, he was an Assistant and an Associate Professor with the Department of Microelectronics at Faculty of Electronics Engineering, University of Nis in Serbia (Yugoslavia).
Dr. Mijalkovic has authored 50 cited publications including the monograph "Multigrid Methods for Process Simulation" published by Springer. In the period 2002-2006 he has set and chaired four editions of "Compact Modeling for RF Application (CMRF)" workshops that strongly contributed to the acceptance of Verilog-A as a standard compact modeling language. He is a senior Member of IEEE and currently a member of the IEEE EDS Compact Modeling Committee.

作者簡介(中文翻譯)

斯洛博丹·米亞爾科維奇博士是Silvaco, Inc.的高級研發工程師,專注於半導體器件和集成電路建模,為電子設計自動化(EDA)軟體工具提供支持。在加入Silvaco Europe之前,他曾是荷蘭代爾夫特科技大學HiTeC實驗室的首席研究員,負責領導一個團隊與緊湊模型聯盟(Compact Model Coalition, CMC)合作標準化Mextram雙極晶體管模型。之前,他曾擔任塞爾維亞尼什大學電子工程學院微電子系的助理教授和副教授。

米亞爾科維奇博士已發表50篇被引用的論文,包括由Springer出版的專著《多重網格方法在過程模擬中的應用》。在2002年至2006年間,他設立並主持了四屆《射頻應用的緊湊建模(CMRF)》研討會,這些研討會對Verilog-A作為標準緊湊建模語言的接受做出了重要貢獻。他是IEEE的高級會員,目前是IEEE EDS緊湊建模委員會的成員。