Microarchitecture of Network-on-Chip Routers: A Designer's Perspective
暫譯: 網路晶片路由器的微架構:設計師的視角

Giorgos Dimitrakopoulos, Anastasios Psarras, Ioannis Seitanidis

  • 出版商: Springer
  • 出版日期: 2014-08-27
  • 售價: $5,640
  • 貴賓價: 9.5$5,358
  • 語言: 英文
  • 頁數: 175
  • 裝訂: Hardcover
  • ISBN: 1461443008
  • ISBN-13: 9781461443001
  • 海外代購書籍(需單獨結帳)

商品描述

This book provides a unified overview of network-on-chip router micro-architecture, the corresponding design opportunities and challenges, and existing solutions to overcome these challenges. The discussion focuses on the heart of a NoC, the NoC router, and how it interacts with the rest of the system. Coverage includes both basic and advanced design techniques that cover the entire router design space including router organization, flow control, pipelined operation, buffering architectures, as well as allocators’ structure and algorithms. Router micro-architectural options are presented in a step-by-step manner beginning from the basic design principles. Even highly sophisticated design alternatives are categorized and broken down to simpler pieces that can be understood easily and analyzed. This book is an invaluable reference for system, architecture, circuit, and EDA researchers and developers, who are interested in understanding the overall picture of NoC routers' architecture, the associated design challenges, and the available solutions.

商品描述(中文翻譯)

本書提供了網路晶片(Network-on-Chip, NoC)路由器微架構的統一概述,探討了相應的設計機會與挑戰,以及現有的解決方案以克服這些挑戰。討論的重點在於 NoC 的核心,即 NoC 路由器,以及它如何與系統的其他部分互動。內容涵蓋了基本和進階的設計技術,涵蓋了整個路由器設計空間,包括路由器組織、流量控制、管線操作、緩衝架構,以及分配器的結構和演算法。路由器微架構的選項以逐步的方式呈現,從基本設計原則開始。即使是高度複雜的設計替代方案也被分類並拆解為更簡單的部分,以便於理解和分析。本書對於系統、架構、電路和電子設計自動化(EDA)研究人員和開發者來說,是一本寶貴的參考資料,特別是對於那些希望了解 NoC 路由器架構的整體圖景、相關的設計挑戰以及可用解決方案的人士。

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