Digital Systems Design Using VHDL, 3/e (IE-Paperback)

Charles Roth, Jr. Lizy John

Digital Systems Design Using VHDL, 3/e (IE-Paperback)
  • 出版商: Cengage Learning
  • 出版日期: 2017-01-03
  • 定價: $1,120
  • 售價: 9.8 折 $1,098
  • 語言: 英文
  • 頁數: 592
  • 裝訂: Paperback
  • ISBN: 1305638921
  • ISBN-13: 9781305638921
  • 相關分類: ARM

    • 立即出貨 (庫存=1)

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What's New
●COMPLETELY NEW MATERIAL DETAILS THE ARM INSTRUCTION SET AND DESIGN OF A SIMPLE ARM PROCESSOR. This brand new section in Chapter 9 provides students with a thorough understanding of this most widely used instruction set architecture.
●ARM AND MIPS DESIGNS ARE BOTH PRESENTED SO READERS CAN COMPARE THEM. Students are able to easily see the similarities of the designs despite differences in ISA when choosing behavioral design.
●A NEW CHAPTER EMPHASIZES VERIFICATION (CHAPTER 10). Student gain a strong understanding of various verification techniques with this timely content.
●NEW SECTION HIGHLIGHTS STATIC TIMING ANALYSIS. Students learn how to use this method to validate the design as part of the new chapter (10) on verification.
●NEW DESIGN EXAMPLES CLARIFY CONCEPTS FOR READERS. These design examples visually reinforce and clearly exemplify the skills and concepts that each chapter presents.
●NEW END-OF-CHAPTER PROBLEMS PROVIDE KEY OPPORTUNITIES FOR PRACTICE. These numerous new problems give students valuable hands-on practice in implementing the principles they are learning.

目錄大綱

1. REVIEW OF LOGIC DESIGN FUNDAMENTALS
2. INTRODUCTION TO VHDL
3. INTRODUCTION TO PROGRAMMABLE LOGIC DEVICES
4. DESIGN EXAMPLES
5. SM CHARTS AND MICROPROGRAMMING
6. DESIGNING WITH FIELD PROGRAMMABLE GATE ARRAYS
7. FLOATING-POINT ARITHMETIC
8. ADDITIONAL TOPICS IN VHDL
9. DESIGN OF A RISC MICROPROCESSOR
10. VERIFICATION OF DIGITAL SYSTEMS
11. HARDWARE TESTING AND DESIGN FOR TESTABILITY
12. ADDITIONAL DESIGN EXAMPLES (ONLINE)
Appendix A: VHDL Language Summary
Appendix B: IEEE Standard Libraries
Appendix C: TEXTIO Package
Appendix D: Projects

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