Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems
暫譯: 交換機/路由器架構:基於共享匯流排和共享記憶體的系統

Aweya, James

  • 出版商: IEEE
  • 出版日期: 2018-06-06
  • 售價: $4,650
  • 貴賓價: 9.5$4,418
  • 語言: 英文
  • 頁數: 336
  • 裝訂: Hardcover - also called cloth, retail trade, or trade
  • ISBN: 1119486157
  • ISBN-13: 9781119486152
  • 海外代購書籍(需單獨結帳)

商品描述

A practicing engineer's inclusive review of communication systems based on shared-bus and shared-memory switch/router architectures

This book delves into the inner workings of router and switch design in a comprehensive manner that is accessible to a broad audience. It begins by describing the role of switch/routers in a network, then moves on to the functional composition of a switch/router. A comparison of centralized versus distributed design of the architecture is also presented. The author discusses use of bus versus shared-memory for communication within a design, and also covers Quality of Service (QoS) mechanisms and configuration tools.

Written in a simple style and language to allow readers to easily understand and appreciate the material presented, Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems discusses the design of multilayer switches--starting with the basic concepts and on to the basic architectures. It describes the evolution of multilayer switch designs and highlights the major performance issues affecting each design. It addresses the need to build faster multilayer switches and examines the architectural constraints imposed by the various multilayer switch designs. The book also discusses design issues including performance, implementation complexity, and scalability to higher speeds. This resource also:

  • Summarizes principles of operation and explores the most common installed routers
  • Covers the design of example architectures (shared bus and memory based architectures), starting from early software based designs
  • Provides case studies to enhance reader comprehension

Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems is an excellent guide for advanced undergraduate and graduate level students, as well for engineers and researchers working in the field.

商品描述(中文翻譯)

一位實務工程師對基於共享匯流排和共享記憶體交換器/路由器架構的通訊系統進行的全面性回顧

本書深入探討了路由器和交換器設計的內部運作,以一種廣泛受眾可理解的方式進行介紹。它首先描述了交換器/路由器在網路中的角色,然後轉向交換器/路由器的功能組成。書中還對集中式與分散式架構設計進行了比較。作者討論了在設計中使用匯流排與共享記憶體進行通訊的優缺點,並涵蓋了服務品質(Quality of Service, QoS)機制和配置工具。

本書以簡單的風格和語言撰寫,使讀者能夠輕鬆理解和欣賞所呈現的材料,《Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems》討論了多層交換器的設計——從基本概念開始,然後進入基本架構。它描述了多層交換器設計的演變,並突顯了影響每種設計的主要性能問題。書中針對建造更快的多層交換器的需求進行了探討,並檢視了各種多層交換器設計所施加的架構限制。該書還討論了設計問題,包括性能、實施複雜性和向更高速度的可擴展性。這本資源還:

- 總結了操作原則並探討了最常見的已安裝路由器
- 涵蓋了示例架構的設計(基於共享匯流排和記憶體的架構),從早期的軟體基礎設計開始
- 提供案例研究以增強讀者的理解

《Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems》是高級本科生和研究生的優秀指南,同時也適合在該領域工作的工程師和研究人員。

作者簡介

JAMES AWEYA, PHD, is a Chief Research Scientist at Etisalat British Telecom Innovation Center (EBTIC) in Abu Dhabi, UAE. He has been granted 63 US patents and has published over 54 journal papers, 39 conference papers, and 43 Nortel technical reports. Dr. Aweya is a Senior Member of IEEE.

作者簡介(中文翻譯)

**詹姆斯·阿維亞(JAMES AWEYA),博士**,是阿布達比阿聯酋Etisalat British Telecom Innovation Center (EBTIC)的首席研究科學家。他已獲得63項美國專利,並發表了超過54篇期刊論文、39篇會議論文和43篇Nortel技術報告。阿維亞博士是IEEE的資深會員。

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