Architectures for Computer Vision: From Algorithm to Chip with Verilog (Hardcover)
暫譯: 計算機視覺架構:從演算法到晶片的 Verilog 實現 (精裝版)

Hong Jeong

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商品描述

This book provides comprehensive coverage of 3D vision systems, from vision models and state-of-the-art algorithms to their hardware architectures for implementation on DSPs, FPGA and ASIC chips, and GPUs. It aims to fill the gaps between computer vision algorithms and real-time digital circuit implementations, especially with Verilog HDL design. The organization of this book is vision and hardware module directed, based on Verilog vision modules, 3D vision modules, parallel vision architectures, and Verilog designs for the stereo matching system with various parallel architectures. It provides Verilog vision simulators, tailored to the design and testing of general vision chips. It bridges the differences between C/C++ and HDL to encompass both software realization and chip implementation; includes numerous examples that realize vision algorithms and general vision processing in HDL. It is unique in providing an organized and complete overview of how a real-time 3D vision system-on-chip can be designed. It focuses on the digital VLSI aspects and implementation of digital signal processing tasks on hardware platforms such as ASICs and FPGAs for 3D vision systems, which have not been comprehensively covered in one single book. It provides a timely view of the pervasive use of vision systems and the challenges of fusing information from different vision modules. The accompanying website includes software and HDL code packages to enhance further learning and develop advanced systems. A solution set and lecture slides are provided on the book's companion website. The book is aimed at graduate students and researchers in computer vision and embedded systems, as well as chip and FPGA designers. Senior undergraduate students specializing in VLSI design or computer vision will also find the book to be helpful in understanding advanced applications.

商品描述(中文翻譯)

本書全面涵蓋了3D視覺系統,從視覺模型和最先進的演算法到其在DSP、FPGA和ASIC晶片以及GPU上的硬體架構實現。它旨在填補計算機視覺演算法與實時數位電路實現之間的空白,特別是使用Verilog HDL設計。本書的組織以視覺和硬體模組為導向,基於Verilog視覺模組、3D視覺模組、平行視覺架構,以及針對各種平行架構的立體匹配系統的Verilog設計。它提供了Verilog視覺模擬器,專為一般視覺晶片的設計和測試量身定制。它橋接了C/C++和HDL之間的差異,涵蓋了軟體實現和晶片實現;包括許多實現視覺演算法和一般視覺處理的HDL範例。本書獨特之處在於提供了一個有組織且完整的概述,說明如何設計一個實時的3D視覺系統晶片。它專注於數位VLSI的各個方面以及在ASIC和FPGA等硬體平台上實現數位信號處理任務,這些內容在單一本書中尚未得到全面涵蓋。本書及時反映了視覺系統的廣泛應用及融合來自不同視覺模組的信息所面臨的挑戰。隨書附帶的網站包括軟體和HDL程式碼包,以增強進一步學習並開發先進系統。書籍的伴隨網站提供了解決方案集和講義幻燈片。本書的目標讀者為計算機視覺和嵌入式系統的研究生和研究人員,以及晶片和FPGA設計師。專攻VLSI設計或計算機視覺的高年級本科生也會發現本書對理解先進應用非常有幫助。