Network Processors : Architectures , Protocols and Platforms (IE-Paperback)
Panos C. Lekkas
- 出版商: McGraw-Hill Education
- 出版日期: 2003-07-31
- 定價: $1,650
- 售價: 9.0 折 $1,485
- 語言: 英文
- 頁數: 456
- ISBN: 0071236090
- ISBN-13: 9780071236096
-
相關分類:
Web-crawler 網路爬蟲、Computer-networks
-
其他版本:
Network Processors : Architectures, Protocols and Platforms
立即出貨
買這商品的人也買了...
-
$680$537 -
$600$540 -
$650$553 -
$920$727 -
$880$695 -
$1,860$1,767 -
$1,900$1,805 -
$690$587 -
$780$741 -
$650$553 -
$760$600 -
$590$466 -
$690$538 -
$780$616 -
$720$569 -
$290$261 -
$880$792 -
$560$442 -
$620$490 -
$750$675 -
$490$382 -
$690$538 -
$560$504 -
$2,350$2,233 -
$480$379
相關主題
商品描述
Written with insight by a leading telecommunications chip industry veteran, Network Processor: Architectures, Protocols, and Platforms delivers an eye-opening whole picture look at the revolution in high-speed network equipment and provides a unique top-to-bottom review of more than 20 network processing platforms (including NP chips and coprocessors). With Network Processors, you will:
* Get a clear detailed look at all NPs commercially available through mid-2003
* Learn how and why NP architectures differ from classical CPUs
* Plan for a new generation of chips used in routers and switches
* Understand the specific design trade-offs entailed by each new NP
* Understand how to evaluate platforms and architectures while being cognizant of inevitable market forces affecting NP vendors
* Understand and prepare for the issues associated with rapidly developing reusable networking software for these new processors
* Save time with a handy down-to-earth reference that, unlike other books on the subject, does not limit itself to only one companys approach or engage in abstract scholarly discussions that are not useful for an engineers or managers everyday reality
* Get wide view coverage of this new technology followed by directions for deeper, more specialized implementation based on your own needs
A PRACTICAL EDUCATION IN NETWORK PROCESSORS:
* Why Network Processors?
* IBM PowerNP(tm) Architecture
* Intel IXA(tm) Architecture
* AMCC nP(tm) Family of Network Processors
* Agere PayloadPlus(R) Family of Network Processors
* Motorola C-Port(R) Family of Network Processors
* Other NPU Architectures
* Alternatives to NPUs: Net ASICs & Designing with IP Cores
* Switch Fabrics
* Searcg Engines and Content-Addressable Memory (CAM)
* Classification Processors
* Traffic Managers
* Storage Coprocessors and TCP Offload Engines
* Security Coprocessors
* Systems Engineering and Software Development Issues
A MUST READ FOR:
* Hardware engineers who develop networking equipment
* Softwre engineers who code network software
* Communications chip designers
* Systems Architects or integrators
* Managers who need the facts
* Consultants
Contents
PART 1: FUNDAMENTALS
Chapter 1:
The Evolution of Network Technology: Distributed Computing and the Convergence
of Networks
Chapter 2: Network Processors:
Justification
Chapter 3: Packet
Processing
PART 2: NETWORK PROCESSOR
ARCHITECTURE
Chapter 4: IBM
PowerNP(tm)
Chapter 5: Intel IXA(tm) Network
Processors
Chapter 6: AMCC nP(tm) Family of Network
Processors
Chapter 7: Agere PayloadPlus(r) Family of
Network Processors
Chapter 8: Motorolas C-Port(tm) Family
of Network Processors
Chapter 9: Other NPU
Architectures
Chapter 10: Alternative Approaches to
Network Processing: Net ASICs and Designing with IP Cores
PART
3: PERIPHERAL CHIPS SUPPORTING NETWORK PROCESSORS: STORAGE PROCESSORS,
CLASSIFICATION PROCESSORS, SEARCH ENGINES, SWITCH FABRICS, AND TRAFFIC
MANAGERS
Chapter 11: Storage Network Processors
(SNPs)
Chapter 12: Search
Engines
Chapter 13: Classification
Processors
Chapter 14: Switch
Fabrics
Chapter 15: Traffic Managers
PART
4: PUTTING EVERYTHING TOGETHER
Chapter 16: Systems
Engineering Issues
PART 5: SECURITY
COPROCESSORS
Chapter 17: Security
Coprocessors
LIST OF
ACRONYMS
APPENDIX I: OVERVIEW OF NETWORK-PROCESSOR
PRODUCTS AND PLATFORMS
APPENDIX II: TYPICAL TRAFFIC
LOAD (in Millions of Packets per Second) CORRESPONDENCE AT VARIOUS LINK SPEEDS
AND PACKET SIZES
APPENDIX III: STANDARDIZATION
EFFORTS IN NETWORK
PROCESSING
INDEX
商品描述(中文翻譯)
《網絡處理器的核心》
由一位領先的電信芯片行業老手撰寫,《網絡處理器:架構、協議和平台》提供了一個令人驚嘆的整體圖景,展示了高速網絡設備革命的全貌,並對20多個網絡處理平台(包括NP芯片和協處理器)進行了獨特的全面回顧。通過這本書,您將:
- 了解到截至2003年中期商業上可用的所有NP的詳細情況
- 了解NP架構與傳統CPU的區別及原因
- 規劃用於路由器和交換機的新一代芯片
- 理解每個新NP所涉及的具體設計折衷
- 在考慮到不可避免影響NP供應商的市場力量的情況下,了解如何評估平台和架構
- 理解並為這些新處理器快速開發可重用網絡軟件所涉及的問題
- 通過這本實用的參考書節省時間,不同於其他只涉及一家公司方法或從事抽象學術討論並不適用於工程師或經理日常現實的書籍
- 從廣泛的視角了解這項新技術,然後根據自己的需求進一步進行更專門的實施
《網絡處理器的實用教育》:
- 為什麼需要網絡處理器?
- IBM PowerNP(tm)架構
- Intel IXA(tm)架構
- AMCC nP(tm)系列網絡處理器
- Agere PayloadPlus(R)系列網絡處理器
- Motorola C-Port(R)系列網絡處理器
- 其他NPU架構
- NPU的替代方案:網絡ASIC和使用IP核心進行設計
- 交換機結構
- 搜索引擎和內容可寻址記憶體(CAM)
- 分類處理器
- 流量管理器
- 存儲協處理器和TCP卸載引擎
- 安全協處理器
- 系統工程和軟件開發問題
《必讀對象》:
- 開發網絡設備的硬件工程師
- 編寫網絡軟件的軟件工程師
- 通信芯片設計師
- 系統架構師或集成商
- 需要事實的經理
- 顧問
《目錄》:
- 第1部分:基礎知識
- 第1章:網絡技術的演進:分散計算和網絡融合
- 第2章:網絡處理器:正當性
- 第3章:封包處理
- 第2部分:網絡處理器架構
- 第4章:IBM PowerNP(tm)
- 第5章:Intel IXA(tm)網絡處理器
- 第6章:AMCC nP(tm)系列網絡處理器
- 第7章:Agere PayloadPlus(r)系列網絡處理器
- 第8章:Motorola C-Port(tm)系列網絡處理器
- 第9章:其他NPU架構
- 第10章:網絡處理的替代方法:網絡ASIC和使用IP核心進行設計
- 第3部分:支持網絡處理器的外圍芯片:存儲處理器、分類處理器、搜索引擎、交換機結構和流量管理器
- 第11章:存儲網絡處理器(SNPs)
- 第12章:搜索引擎
- 第13章:分類處理器