Integrated Nanodevice and Nanosystem Fabrication: Breakthroughs and Alternatives (Pan Stanford Series on Intelligent Nanosystems)
暫譯: 整合奈米裝置與奈米系統製造:突破與替代方案(潘斯坦福智能奈米系統系列)
- 出版商: Pan Stanford Publish
- 出版日期: 2017-11-14
- 售價: $6,080
- 貴賓價: 9.5 折 $5,776
- 語言: 英文
- 頁數: 326
- 裝訂: Hardcover
- ISBN: 9814774227
- ISBN-13: 9789814774222
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商品描述
Since its invention, the integrated circuit has necessitated new process modules and numerous architectural changes to improve application performances, power consumption, and cost reduction. Silicon CMOS is now well established to offer the integration of several tens of billions of devices on a chip or in a system. At present, there are important challenges in the introduction of heterogeneous co-integration of materials and devices with the silicon CMOS 2D- and 3D-based platforms. New fabrication techniques allowing strong energy and variability efficiency come in as possible players to improve the various figures of merit of fabrication technology.
Integrated Nanodevice and Nanosystem Fabrication: Breakthroughs and Alternatives is the second volume in the Pan Stanford Series on Intelligent Nanosystems. The book contains 8 chapters and is divided into two parts, the first of which reports breakthrough materials and techniques such as single ion implantation in silicon and diamond, graphene and 2D materials, nanofabrication using scanning probe microscopes, while the second tackles the scaling and architectural aspects of silicon devices through HiK scaling for nanoCMOS, nanoscale epitaxial growth of group IV semiconductors, design for variability co-optimization in SOI FinFETs, and nanowires for CMOS and diversifications.
商品描述(中文翻譯)
自從集成電路的發明以來,這項技術需要新的製程模組和許多架構變更,以改善應用性能、降低功耗和減少成本。矽 CMOS 現已成熟,能在晶片或系統上整合數十億個元件。目前,在將異質材料和元件與矽 CMOS 2D 和 3D 基礎平台進行共同整合的過程中,面臨著重要挑戰。新的製造技術能夠實現強大的能量和變異效率,成為改善製造技術各項性能指標的潛在解決方案。
《集成納米裝置與納米系統製造:突破與替代方案》是潘斯坦福系列《智能納米系統》的第二卷。本書包含 8 章,分為兩個部分,第一部分報導了突破性的材料和技術,如在矽和鑽石中的單離子注入、石墨烯和 2D 材料、使用掃描探針顯微鏡的納米製造;第二部分則探討了矽元件的縮放和架構方面,包括 nanoCMOS 的 HiK 縮放、IV 組半導體的納米級外延生長、SOI FinFET 的變異共同優化設計,以及用於 CMOS 的納米線和多樣化技術。