Advanced Multicore Systems-On-Chip: Architecture, On-Chip Network, Design
暫譯: 高階多核心系統單晶片：架構、片上網路、設計

Abderazek Ben Abdallah

Advanced Multicore Systems-On-Chip: Architecture, On-Chip Network, Design
  • 出版商: Springer
  • 出版日期: 2017-09-18
  • 售價: $7,160
  • 貴賓價: 9.5 折 $6,802
  • 語言: 英文
  • 頁數: 273
  • 裝訂: Hardcover
  • ISBN: 9811060916
  • ISBN-13: 9789811060915

    • 海外代購書籍(需單獨結帳)

商品描述

From basic architecture, interconnection, and parallelization to power optimization, this book provides a comprehensive description of emerging multicore systems-on-chip (MCSoCs) hardware and software design. Highlighting both fundamentals and advanced software and hardware design, it can serve as a primary textbook for advanced courses in MCSoCs design and embedded systems.

The first three chapters introduce MCSoCs architectures, present design challenges and conventional design methods, and describe in detail the main building blocks of MCSoCs. Chapters 4, 5, and 6 discuss fundamental and advanced on-chip interconnection network technologies for multi and many core SoCs, enabling readers to understand the microarchitectures for on-chip routers and network interfaces that are essential in the context of latency, area, and power constraints. 

With the rise of multicore and many-core systems, concurrency is becoming a major issue in the daily life of a programmer. Thus, compiler and software development tools are critical in helping programmers create high-performance software. Programmers should make sure that their parallelized program codes will not cause race condition, memory-access deadlocks, or other faults that may crash their entire systems. As such, Chapter 7 describes a novel parallelizing compiler design for high-performance computing. Chapter 8 provides a detailed investigation of power reduction techniques for MCSoCs at component and network levels. It discusses energy conservation in general hardware design, and also in embedded multicore system components, such as CPUs, disks, displays and memories. Lastly, Chapter 9 presents a real embedded MCSoCs system design targeted for health monitoring in the elderly. 

商品描述(中文翻譯)

從基本架構、互連和平行化到功率優化，本書提供了新興多核心系統單晶片（MCSoCs）硬體和軟體設計的全面描述。強調基礎知識和進階的軟體與硬體設計，本書可作為MCSoCs設計和嵌入式系統高級課程的主要教科書。

前三章介紹了MCSoCs架構，提出設計挑戰和傳統設計方法，並詳細描述了MCSoCs的主要組成部分。第4、5和6章討論了多核心和多核心系統的基本和進階片上互連網路技術，使讀者能夠理解在延遲、面積和功率限制的背景下，片上路由器和網路介面的微架構。

隨著多核心和多核系統的興起，並行性成為程式設計師日常生活中的一個主要問題。因此，編譯器和軟體開發工具對於幫助程式設計師創建高效能軟體至關重要。程式設計師應確保他們的平行化程式碼不會導致競爭條件、記憶體存取死鎖或其他可能使整個系統崩潰的錯誤。因此，第7章描述了一種針對高效能計算的新型平行化編譯器設計。第8章對MCSoCs在元件和網路層級的功率降低技術進行了詳細調查。它討論了在一般硬體設計中的能源節約，以及在嵌入式多核心系統元件中的能源節約，例如CPU、磁碟、顯示器和記憶體。最後，第9章介紹了一個針對老年人健康監測的實際嵌入式MCSoCs系統設計。

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