Fault Tolerant Memories: Background, Concepts & Techniques
暫譯: 容錯記憶體:背景、概念與技術

Altaf Mukati

  • 出版商: LAP LAMBERT
  • 出版日期: 2012-05-06
  • 售價: $3,260
  • 貴賓價: 9.5$3,097
  • 語言: 英文
  • 頁數: 260
  • 裝訂: Paperback
  • ISBN: 3848487594
  • ISBN-13: 9783848487592
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商品描述

This book presents some novel techniques to deal with the memory errors. The memories, specially the DRAMs, are the big source of errors in computer-based systems. These errors may cause system failures. If the systems are "critical", such as Flight Control Systems, Nuclear Power Plant Control Systems, Space-Bound Systems, Financial Transaction Processing Systems, Traffic Light Control Systems etc., then a single failure may cause human catastrophes or great financial losses. Although the current fabrication technologies are more reliable than earlier ones but the advantage has been offset by the high degree of complexities of today's circuits. The process technology at present scales around 50 nano-meters and the density of DRAMs is in the vicinity of 10 Gb per centimeter square. Such miniaturization has created the new reliability threats to the memory designers. The techniques presented in this book can help the designers to improve the reliability of memories by correcting single & multiple bit errors. The techniques make use of hardware and/or information redundancies. Although this may increase the cost of such systems, but provides improved reliability.

商品描述(中文翻譯)

本書介紹了一些新穎的技術來處理記憶體錯誤。記憶體,特別是DRAM,是基於計算機系統中錯誤的主要來源。這些錯誤可能導致系統故障。如果系統是「關鍵性」的,例如飛行控制系統、核電廠控制系統、太空系統、金融交易處理系統、交通信號控制系統等,那麼單一的故障可能會造成重大的災難或巨大的財務損失。

儘管目前的製造技術比早期的更可靠,但這一優勢已被當今電路的高複雜性所抵消。目前的製程技術約為50納米,DRAM的密度接近每平方厘米10 Gb。這種微型化為記憶體設計師帶來了新的可靠性威脅。

本書中提出的技術可以幫助設計師通過糾正單位和多位元錯誤來提高記憶體的可靠性。這些技術利用了硬體和/或資訊冗餘。儘管這可能會增加這些系統的成本,但卻提供了更高的可靠性。

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