Memory Controllers for Mixed-Time-Criticality Systems: Architectures, Methodologies and Trade-Offs (Embedded Systems)
暫譯: 混合時間關鍵系統的記憶體控制器：架構、方法論與權衡（嵌入式系統）
Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens
商品描述
This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.
商品描述(中文翻譯)
本書討論了針對即時和最佳努力應用的 SDRAM 控制器的設計與性能分析，即混合時間關鍵性記憶體控制器。作者描述了當前的技術狀態，然後專注於一種可重構記憶體控制器的架構模板，該模板有效地應對快速演變的 SDRAM 標準，涵蓋最壞情況的時序和功耗分析，以及實作。書中使用了在 SystemC 和可合成 VHDL 中為 FPGA 開發板實作的控制器原型，作為該架構模板的概念驗證。
