Fundamentals of IP and SoC Security: Design, Verification, and Debug
暫譯: IP 與 SoC 安全基礎:設計、驗證與除錯

  • 出版商: Springer
  • 出版日期: 2017-02-01
  • 售價: $5,590
  • 貴賓價: 9.5$5,311
  • 語言: 英文
  • 頁數: 316
  • 裝訂: Hardcover
  • ISBN: 3319500554
  • ISBN-13: 9783319500553
  • 相關分類: 資訊安全
  • 海外代購書籍(需單獨結帳)

相關主題

商品描述

This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the “trenches” of current industrial practice in design, implementation, and validation of security-critical embedded systems.

  • Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs;
  • Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs; 
  • Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security.

 

商品描述(中文翻譯)

這本書探討嵌入式系統的安全性,並提供有關系統單晶片(SoC)設計中安全性各個方面的權威參考。作者討論的議題包括SoC設計中的安全需求、安全架構的定義和設計選擇以強制和驗證安全政策,以及涉及安全性、功能性和除錯需求的權衡與衝突。內容還包括來自當前工業實踐中設計、實施和驗證安全關鍵嵌入式系統的案例研究。

- 提供嵌入式系統、硬體IP和SoC設計中安全性的最新狀態的權威參考和總結;
- 採取「橫向」的安全觀點,與不同的設計和驗證組件互動,如架構、實施、驗證和除錯,每個組件都強制獨特的權衡;
- 包含高層次概述、實施的詳細分析,以及與IP/SoC安全相關的設計/驗證/除錯問題的相關案例研究。