From Code to Chip: Open-Source Automated Analog Layout Design
暫譯: 從程式碼到晶片：開源自動化類比佈局設計
Ratschenberger, Jakob, Pretl, Harald
- 出版商: Springer
- 出版日期: 2025-01-11
- 售價: $1,740
- 貴賓價: 9.5 折 $1,653
- 語言: 英文
- 頁數: 120
- 裝訂: Hardcover - also called cloth, retail trade, or trade
- ISBN: 303168561X
- ISBN-13: 9783031685613
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商品描述
This book shows how the layout of an analog circuit can be automatically generated in a fully open-source way. Based on an exemplary design flow, it introduces and explains the necessary steps for transforming a SPICE netlist into a layout, which can be inspected by the open-source layout editor Magic VLSI. This is done by using the industry's first open-source process design kit SKY130. Furthermore, the implementation of the design flow in the programming language Python is available as open-source on GitHub.
商品描述(中文翻譯)
本書展示了如何以完全開源的方式自動生成類比電路的佈局。基於一個範例設計流程，它介紹並解釋了將 SPICE 網路清單轉換為佈局所需的步驟，該佈局可以通過開源佈局編輯器 Magic VLSI 進行檢查。這是通過使用業界首個開源流程設計套件 SKY130 來實現的。此外，該設計流程在程式語言 Python 中的實現也已作為開源項目發布在 GitHub 上。
作者簡介
Jakob Ratschenberger has received his Bachelor of Science (BSc) in the field of Electronics and Information Technology, from the Johannes Kepler University Linz, Austria, in 2022. He received the Dipl.-Ing. degree (with distinction) in Electronics and Information Technology from the Johannes Kepler University Linz, Austria, in 2024.
Harald Pretl received a Dipl.-Ing. degree (with distinction) in electrical engineering from the Graz University of Technology, Austria, in 1997, and the Dr. techn. degree from the Johannes Kepler University (JKU) in Linz, Austria, in 2001. From 2000 to 2011, he worked at Infineon Technologies as Director and Senior Principal Engineer, from 2011 to 2019 at Intel as Senior Principal Engineer and Chief RF Technologist, and from 2019 to 2022 at Apple, contributing to several generations of cellular RF transceivers. Since 2015, he has been a full professor, heading the Institute for Integrated Circuits (IIC) at JKU. He maintains the IIC-OSIC-TOOLS and is a member of the IEEE SSCS TC-OSE. In 2023, Harald founded PRETL consult GmbH, providing consulting services in the area of IC design.
作者簡介(中文翻譯)
雅各布·拉岑貝格（Jakob Ratschenberger）於2022年在奧地利林茲約翰·凱普勒大學（Johannes Kepler University Linz）獲得電子與資訊技術（Electronics and Information Technology）理學士（BSc）學位。他於2024年在同一所大學獲得電子與資訊技術的工程學位（Dipl.-Ing.，優等）。
哈拉德·普雷特爾（Harald Pretl）於1997年在奧地利格拉茨科技大學（Graz University of Technology）獲得電機工程的工程學位（Dipl.-Ing.，優等），並於2001年在奧地利林茲的約翰·凱普勒大學（JKU）獲得技術博士（Dr. techn.）學位。從2000年到2011年，他在英飛凌科技（Infineon Technologies）擔任總監及高級首席工程師，從2011年到2019年在英特爾（Intel）擔任高級首席工程師及首席射頻技術專家，從2019年到2022年在蘋果（Apple）工作，為幾代行動射頻收發器做出貢獻。自2015年以來，他擔任全職教授，負責約翰·凱普勒大學的集成電路研究所（Institute for Integrated Circuits, IIC）。他維護IIC-OSIC-TOOLS，並且是IEEE SSCS TC-OSE的成員。2023年，哈拉德創立了PRETL consult GmbH，提供集成電路設計領域的諮詢服務。
