Accelerating Network Functions Using Reconfigurable Hardware: Design and Validation of High Throughput and Low Latency Network Functions at the Access
Kundel, Ralf
- 出版商: Springer
- 出版日期: 2024-04-19
- 售價: $6,480
- 貴賓價: 9.5 折 $6,156
- 語言: 英文
- 頁數: 177
- 裝訂: Hardcover - also called cloth, retail trade, or trade
- ISBN: 3031528719
- ISBN-13: 9783031528712
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商品描述
This book reports on new concepts and methods to design network functions on programmable hardware to accelerate connectivity. First, it introduces the host bypassing concept for improved integration of hardware accelerators in computer systems operating 5G radio access networks. This novel concept bypassed the system's main memory and established direct connectivity between the accelerator and network interface card. This concept leads to improved throughput and significantly lowered latency jitter compared to existing methods. Second, the book analyzes different programmable hardware technologies for hardware-accelerated Internet subscriber handling, including three P4-programmable platforms and FPGAs. It shows that all the approaches have excellent performance and are suitable for Internet access creation. In turn, it presents a fully-fledged accelerated User Plane Function (UPF) designed upon these concepts and its testing in an end-to-end 5G standalone network. Third, it analyses and demonstrates the usability of Active Queue Management (AQM) algorithms on programmable hardware as an expansion to the access edge. It shows the feasibility of the CoDel AQM algorithm and discusses the challenges and constraints to be considered when limited hardware is used, resulting in significant improvements in the Quality of Service. Furthermore, the P4STA measurement framework is introduced, a network function benchmarking concept combing precise hardware-based time measurement methods with software-based load generation to simultaneously ensure high measurement accuracy and flexibility. Researchers and professionals will find in this book new solutions to improve both fixed and mobile internet access networks, offering an informative and inspiring reading for researchers and professionals involved in building the next generation of access edge networks and underlying technology.
商品描述(中文翻譯)
本書報告了在可程式硬體上設計網路功能以加速連接的新概念和方法。首先,它介紹了主機旁路概念,以改善硬體加速器在運行5G無線接入網路的計算機系統中的整合。這一新穎的概念繞過了系統的主記憶體,並在加速器與網路介面卡之間建立了直接連接。與現有方法相比,這一概念提高了吞吐量並顯著降低了延遲抖動。其次,本書分析了不同的可程式硬體技術,用於硬體加速的網際網路用戶處理,包括三種P4可程式平台和FPGA。結果顯示,所有方法都具有優異的性能,適合用於網際網路接入的創建。接著,本書提出了一個基於這些概念設計的完整加速用戶平面功能(UPF),並在端到端的5G獨立網路中進行測試。第三,本書分析並展示了在可程式硬體上使用主動佇列管理(AQM)演算法的可用性,作為接入邊緣的擴展。它顯示了CoDel AQM演算法的可行性,並討論了在使用有限硬體時需要考慮的挑戰和限制,從而顯著改善服務質量。此外,本書介紹了P4STA測量框架,這是一種網路功能基準測試概念,結合了精確的硬體基礎時間測量方法與軟體基礎負載生成,以同時確保高測量準確性和靈活性。研究人員和專業人士將在本書中找到改善固定和行動網際網路接入網路的新解決方案,為參與建設下一代接入邊緣網路及其基礎技術的研究人員和專業人士提供了資訊豐富且啟發性的閱讀材料。