Security of Fpga-Accelerated Cloud Computing Environments
暫譯: FPGA 加速雲端運算環境的安全性
Szefer, Jakub, Tessier, Russell
商品描述
- Describes security threats of deploying FPGAs in cloud computing datacenters - and how to protect against them;
- Provides an overview of various security attacks of which cloud providers should be aware;
- Discusses defenses that can be deployed at system and hardware levels;
- Teaches readers about principles for securing cloud-based FPGAs.
商品描述(中文翻譯)
本書探討了FPGA加速的雲端計算環境的安全性。它對當前安全威脅和防禦措施進行了全面的回顧。本書進一步提出了設計原則，以幫助評估和設計安全防止資訊洩漏和潛在攻擊的雲端FPGA部署。
- 描述在雲端計算數據中心部署FPGA的安全威脅，以及如何防範這些威脅；
- 提供雲端服務提供商應該了解的各種安全攻擊的概述；
- 討論可以在系統和硬體層面部署的防禦措施；
- 教導讀者有關保護雲端FPGA的原則。
作者簡介
Jakub Szefer's research focuses on computer architecture and hardware security. His research encompasses secure processor architectures, cloud security, FPGA attacks and defenses, and hardware FPGA implementation of cryptographic algorithms. His research is supported through the National Science Foundation and industry grants and donations. He is currently an Associate Professor of Electrical Engineering at Yale University, where he leads the Computer Architecture and Security Laboratory (CASLAB). Prior to joining Yale, he received Ph.D. and M.A. degrees in Electrical Engineering from Princeton University, and B.S. degree with highest honors in Electrical and Computer Engineering from University of Illinois at Urbana-Champaign. He received the NSF CAREER award in 2017. Jakub is the author of the first book focusing on processor architecture security: "Principles of Secure Processor Architecture Design", published in 2018. He was promoted to the IEEE Senior Member rank in 2019.
Russell Tessier's research interests are in field-programmable gate arrays (FPGAs), reconfigurable computing, and embedded systems. His research program includes the development of new applications of FPGAs for network virtualization, radar processing, and communication coding. Most recently, he has examined the security of FPGA use in computing environments. Dr. Tessier's research is funded by the National Science Foundation, state government, and industry grants and donations. He is Professor of Electrical and Computer Engineering at the University of Massachusetts Amherst, where he serves as the head of the Reconfigurable Computing Group. He received S.M. and Ph.D. degrees in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology, and a B.S. degree in Computer Systems Engineering from Rensselaer Polytechnic Institute. He was a co-founder of Virtual Machine Works, a company that manufactured FPGA-based logic emulators. The company is now owned by Siemens which markets the product under the Veloce brand.作者簡介(中文翻譯)
雅庫布·謝費爾（Jakub Szefer）的研究專注於計算機架構和硬體安全。他的研究涵蓋安全處理器架構、雲端安全、FPGA 攻擊與防禦，以及加密演算法的硬體 FPGA 實現。他的研究得到了國家科學基金會（National Science Foundation）和產業贊助及捐款的支持。他目前是耶魯大學（Yale University）電機工程的副教授，並領導計算機架構與安全實驗室（Computer Architecture and Security Laboratory, CASLAB）。在加入耶魯之前，他在普林斯頓大學（Princeton University）獲得電機工程的博士（Ph.D.）和碩士（M.A.）學位，並在伊利諾伊大學香檳分校（University of Illinois at Urbana-Champaign）獲得電機與計算機工程的最高榮譽學士（B.S.）學位。他於2017年獲得 NSF CAREER 獎。雅庫布是首本專注於處理器架構安全的書籍《安全處理器架構設計原則》（Principles of Secure Processor Architecture Design）的作者，該書於2018年出版。他於2019年晉升為 IEEE 高級會員（Senior Member）。
拉塞爾·泰西爾（Russell Tessier）的研究興趣包括現場可編程閘陣列（FPGAs）、可重構計算和嵌入式系統。他的研究計畫包括開發 FPGA 在網路虛擬化、雷達處理和通訊編碼中的新應用。最近，他研究了 FPGA 在計算環境中的安全性。泰西爾博士的研究由國家科學基金會、州政府及產業贊助和捐款資助。他是麻薩諸塞大學阿默斯特分校（University of Massachusetts Amherst）電機與計算機工程的教授，並擔任可重構計算組的負責人。他在麻薩諸塞州理工學院（Massachusetts Institute of Technology）獲得電機工程和計算機科學的碩士（S.M.）和博士（Ph.D.）學位，並在倫斯勒理工學院（Rensselaer Polytechnic Institute）獲得計算機系統工程的學士（B.S.）學位。他是虛擬機器工作室（Virtual Machine Works）的共同創辦人，該公司製造基於 FPGA 的邏輯仿真器。該公司現在由西門子（Siemens）擁有，並以 Veloce 品牌行銷該產品。
