Security of Fpga-Accelerated Cloud Computing Environments

本書探討了FPGA加速的雲端計算環境的安全性。它對當前安全威脅及防禦措施進行了全面的回顧。本書還提出了設計原則，以協助評估和設計能夠防止資訊洩漏和潛在攻擊的安全雲端FPGA部署。

Jakub Szefer's research focuses on computer architecture and hardware security. His research encompasses secure processor architectures, cloud security, FPGA attacks and defenses, and hardware FPGA implementation of cryptographic algorithms. His research is supported through the National Science Foundation and industry grants and donations. He is currently an Associate Professor of Electrical Engineering at Yale University, where he leads the Computer Architecture and Security Laboratory (CASLAB). Prior to joining Yale, he received Ph.D. and M.A. degrees in Electrical Engineering from Princeton University, and B.S. degree with highest honors in Electrical and Computer Engineering from University of Illinois at Urbana-Champaign. He received the NSF CAREER award in 2017. Jakub is the author of the first book focusing on processor architecture security: "Principles of Secure Processor Architecture Design", published in 2018. He was promoted to the IEEE Senior Member rank in 2019.

Russell Tessier's research interests are in field-programmable gate arrays (FPGAs), reconfigurable computing, and embedded systems. His research program includes the development of new applications of FPGAs for network virtualization, radar processing, and communication coding. Most recently, he has examined the security of FPGA use in computing environments. Dr. Tessier's research is funded by the National Science Foundation, state government, and industry grants and donations. He is Professor of Electrical and Computer Engineering at the University of Massachusetts Amherst, where he serves as the head of the Reconfigurable Computing Group. He received S.M. and Ph.D. degrees in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology, and a B.S. degree in Computer Systems Engineering from Rensselaer Polytechnic Institute. He was a co-founder of Virtual Machine Works, a company that manufactured FPGA-based logic emulators. The company is now owned by Siemens which markets the product under the Veloce brand.

Jakub Szefer 的研究專注於計算機架構和硬體安全。他的研究範疇包括安全處理器架構、雲端安全、FPGA 攻擊與防禦，以及加密演算法的硬體 FPGA 實作。他的研究獲得國家科學基金會和產業贊助及捐款的支持。他目前是耶魯大學電機工程的副教授，並領導計算機架構與安全實驗室（CASLAB）。在加入耶魯之前，他在普林斯頓大學獲得電機工程的博士和碩士學位，並在伊利諾伊大學香檳分校獲得電機與計算機工程的最高榮譽學士學位。他於 2017 年獲得 NSF CAREER 獎。Jakub 是首本專注於處理器架構安全的書籍《Principles of Secure Processor Architecture Design》的作者，該書於 2018 年出版。他於 2019 年晉升為 IEEE 高級會員。

Russell Tessier 的研究興趣包括現場可編程閘陣列（FPGAs）、可重構計算和嵌入式系統。他的研究計畫包括開發 FPGA 在網路虛擬化、雷達處理和通訊編碼中的新應用。最近，他研究了 FPGA 在計算環境中的安全性。Tessier 博士的研究獲得國家科學基金會、州政府及產業贊助和捐款的資助。他是麻薩諸塞大學阿默斯特分校電機與計算機工程的教授，並擔任可重構計算小組的負責人。他在麻薩諸塞州理工學院獲得電機工程和計算機科學的碩士和博士學位，並在倫斯勒理工學院獲得計算機系統工程的學士學位。他是 Virtual Machine Works 的共同創辦人，該公司製造基於 FPGA 的邏輯模擬器。該公司目前由西門子擁有，並以 Veloce 品牌行銷該產品。