Structural Decision Diagrams in Digital Test: Theory and Applications

這是第一本以一種新的結構決策圖模型總結數位電路和系統的測試相關建模的書籍。該模型將結構和功能信息聯合表示，開辟了一個新的研究領域。

該書介紹並討論了兩種類型的結構決策圖（DD）的應用：低層次的結構合成二進制DD（SSBDDs）和高層次的DD（HLDDs），這些圖能夠對複雜的數位電路和系統進行診斷建模。

主題和特點：
- 提供SSBDDs和HLDDs的定義、特性和合成、壓縮和優化技術
- 提供多個實例來說明文本的關鍵點
- 描述了SSBDDs和HLDDs在各種電子設計自動化（EDA）任務中的應用，例如邏輯級故障建模和模擬、多值模擬、時序關鍵路徑識別和測試生成
- 討論了所提出模型相對於傳統二進制決策圖和其他傳統設計表示方法的優勢
- 將SSBDDs與HLDDs結合，實現數位系統的多層次表示，實現複雜測試相關任務的分層和跨層求解

這本獨特的書籍針對從事計算機科學和計算機工程領域的研究人員，專注於數位系統的測試、診斷和可靠性。它也可以作為研究生和高年級本科計算機工程和電子學課程的參考書。

三位作者隸屬於愛沙尼亞塔林技術大學的計算機系統部門：Raimund Ubar是退休教授，Jaan Raik和Maksim Jenihhin是終身教授。Artur Jutman博士是該大學的研究員，也是愛沙尼亞Testonica Lab Ltd.的首席執行官。

Prof. Emeritus Raimund Ubar is a professor emeritus at the Department of Computer Systems of Tallinn University of Technology, Estonia. He received his Ph.D. degree at Bauman Moscow State Technical University in 1971, and DSc degree at Latvian Academy of Sciences in 1986. He has been with TU Tallinn since 1971, Head of the Computer Department (1987-1992), Head and Founder of the Electronics Competence Center (1993-1996), and Head of the Estonian Research Centre for Integrated Electronic Systems and Biomedical Engineering (2007-2015). He has published more than 500 peer-reviewed scientific papers and 5 books and supervised 20 PhDs. His research interests cover a wide area in electrical engineering and computer science domains, including digital design and test, fault modeling and diagnosis, design for testability, as well as fault tolerance and built-in self-test. He has lectured and given courses at more than 20 universities, served as General Chair for the European Test Conference, and other conferences such as NORCHIP, BEC, EWDTC. He is a member of Estonian Academy of Sciences, Life Senior Member of IEEE, Golden Core member of IEEE Computer Society, and honored professor of Ukrainian State University of Radioelectronics. He was awarded from Estonian Government by White Cross Orden of III Class, by National Award for Long-term Successful R&D, and by several Meritorious Service Awards of the IEEE Computer Society.

Recent books:

1. R.Ubar, A.Jasnetski, A.Tsertov, A.S.Oyeniran. Software-Based Self-Test with Decision Diagrams for Microprocessors. Lambert Academic Publishing, 2018, 171 p.

2. R.Ubar, J.Raik, H.-T.Vierhaus (Eds). Design and Test Technology for Dependable Systems-on-Chip. IGI Global, 2011, 550 p.

3. O.Novak, E.Gramatova, R.Ubar. Handbook of Electronic Testing. CTU Printhouse, Prague, 2005, 400 p

Prof. Jaan Raik is a professor of digital systems' verification at the Department of Computer Systems and the head of the Centre for Dependable Computing Systems of Tallinn University of Technology (TalTech), Estonia. Prof. Raik received his M.Sc. and Ph.D. degrees at TalTech in 1997 and in 2001, respectively. He has co-authored more than 200 peer-reviewed scientific publications. His research interests cover a wide area in electrical engineering and computer science domains, including hardware test, functional verification, fault-tolerance and security as well as emerging computer architectures. He is a member of IEEE Computer Society, HiPEAC and a member of steering/program committees of several leading conferences in his fields. He acted as the General Co-Chair of IEEE European Test Symposium 2020, the General Chair of the IFIP/IEEE VLSI-SoC'16 and IEEE DDECS'12 Conferences and the Program Co-Chair of IEEE DDECS'23, CDN-Live'16 and the Program Chair of IEEE DDECS'15. He was the main coordinator for several Europe-wide research and collaboration actions. 16 PhD Theses have been successfullydefended under his supervision.

Prof. Maksim Jenihhin is a tenured associate professor of Computing Systems Reliability at the Department of Computer Systems of Tallinn University of Technology and the head of the research group "Trustworthy and Efficient Computing Hardware". He received his Ph.D. degree in Computer Engineering from the same university in 2008. His research interests include methodologies and EDA tools for hardware design, verification and debugging as well as nanoelectronics reliability and manufacturing test topics. He supervised 5 PhD theses on these topics and published more than 170 peer-reviewed publications. He is a coordinator for national and European research projects, including H2020 MSCA ITN "RESCUE - Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems Design", PRG 2022 "CRASHLESS- Cross-Layer Reliability and Self-Health Awareness for Intelligent Autonomous Systems". Prof. Jenihhin is a member of executive and program committees for IEEE ETS, DATE, DDECS, and a number of other international events and served as a guest editor for special issues of journals.

Dr. Artur Jutman has been managing industrial and research projects in Testonica Lab Ltd. for over 15 years now. His professional focus embraces such topics as diagnostic and defect modeling, test optimization, embedded test instrumentation, test firmware, BIST, DFT as well as both ASIC and system test in a broad sense - all yielding over 160 peer-reviewed research papers published. Dr. Jutman has co-ordinated several EU-funded research projects on test-related topics, participated in organizing test conferences and workshops across Europe as well as given several keynotes, invited talks, embedded and full tutorials at international conferences and symposia. Being deeply inspired by test technologies, Artur has given numerous hands-on training sessions and lecture courses in testing, diagnostics, and DFT for industrial engineers and graduate students in several countries, incl. Germany, Italy, Sweden, Portugal, Russia, and Estonia. Before starting his industrial career, Dr. Jutman spent cumulatively several years being a visiting researcher in several universities across Europe, incl. TU Darmstadt, TU Ilmenau, TU Warsaw, TU Jonkoping, Politecnico di Torino, University of Aveiro, and University of Linkoping. He is also a member of the executive committee of the Nordic Test Forum (NTF) society. Dr. Artur Jutman received his M.Sc. and Ph.D. degrees in computer engineering from Tallinn University of Technology, Estonia in 1999 and 2004 respectively.

Prof. Emeritus Raimund Ubar是愛沙尼亞塔林科技大學計算機系統學院的名譽教授。他於1971年在莫斯科巴曼國立技術大學獲得博士學位，並於1986年在拉脫維亞科學院獲得DSc學位。他自1971年起一直在塔林科技大學任職，曾擔任計算機系主任（1987-1992年），電子競爭中心的創始人和負責人（1993-1996年），以及愛沙尼亞集成電子系統和生物醫學工程研究中心的負責人（2007-2015年）。他發表了500多篇同行評審的科學論文和5本書籍，並指導了20位博士生。他的研究興趣涵蓋了電氣工程和計算機科學領域的廣泛範圍，包括數字設計和測試、故障建模和診斷、可測試性設計以及容錯和內建自測。他在20多所大學講授課程，擔任歐洲測試大會等會議的總主席。他是愛沙尼亞科學院的成員，IEEE的終身高級會員，IEEE計算機學會的金核心成員，以及烏克蘭國立無線電電子學大學的榮譽教授。他曾獲得愛沙尼亞政府頒發的三等白十字勳章、長期成功研發國家獎，以及IEEE計算機學會的多項傑出服務獎。

最近的書籍:
1. R.Ubar, A.Jasnetski, A.Tsertov, A.S.Oyeniran. Software-Based Self-Test with Decision Diagrams for Microprocessors. Lambert Academic Publishing, 2018, 171 p.
2. R.Ubar, J.Raik, H.-T.Vierhaus (Eds). Design and Test Technology for Dependable Systems-on-Chip. IGI Global, 2011, 550 p.
3. O.Novak, E.Gramatova, R.Ubar. Handbook of Electronic Testing. CTU Printhouse, Prague, 2005, 400 p

Prof. Jaan Raik是愛沙尼亞塔林科技大學（TalTech）計算機系統學院的數字系統驗證教授，也是可靠計算系統中心的負責人。Raik教授於1997年和2001年在TalTech獲得碩士和博士學位。他共同撰寫了200多篇同行評審的科學論文。他的研究興趣涵蓋了電氣工程和計算機科學領域的廣泛範圍，包括硬件測試、功能驗證、容錯和安全性以及新興計算機架構。他是IEEE計算機學會和HiPEAC的成員，並擔任多個領先會議的指導/程序委員會成員。他曾擔任IEEE歐洲測試研討會2020的總共同主席，IFIP/IEEE VLSI-SoC'16和IEEE DDECS'12會議的總主席，以及IEEE DDECS'23、CDN-Live'16的程序共同主席和IEEE DDECS'15的程序主席。他是幾個歐洲範圍內研究和合作行動的主要協調人。在他的指導下，已成功完成了16個博士論文的答辯。

Prof. Maksim Jenihhin是愛沙尼亞塔林科技大學計算機系統學院的終身副教授，也是“可信和高效計算硬件”研究小組的負責人。他於2008年在同一所大學獲得計算機工程博士學位。他的研究興趣包括硬件設計、驗證和調試的方法論和EDA工具，以及納米電子可靠性和製造測試等主題。他在這些主題上指導了5個博士論文，並發表了170多篇同行評審的論文。他是國家和歐洲研究項目的協調人，包括H2020 MSCA ITN“RESCUE - 納米電子系統設計中的可靠性、安全性和質量相互依賴的挑戰”和PRG 2022“CRASHLESS-智能自主系統的跨層可靠性和自我健康意識”。Jenihhin教授是執行和專業委員會的成員。