VLSI Physical Design: From Graph Partitioning to Timing Closure
暫譯: VLSI 物理設計:從圖形分割到時序收斂
Kahng, Andrew B., Lienig, Jens, Markov, Igor L.
- 出版商: Springer
- 出版日期: 2022-06-16
- 售價: $3,860
- 貴賓價: 9.5 折 $3,667
- 語言: 英文
- 頁數: 325
- 裝訂: Hardcover - also called cloth, retail trade, or trade
- ISBN: 3030964140
- ISBN-13: 9783030964146
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相關分類:
VLSI
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相關翻譯:
超大規模積體電路物理設計:從圖分割到時序收斂(原書第2版) (簡中版)
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其他版本:
VLSI Physical Design: From Graph Partitioning to Timing Closure
相關主題
商品描述
1 Introduction. 1.1 Electronic Design Automation (EDA). 1.2 VLSI Design Flow. 1.3 VLSI Design Styles. 1.4 Layout Layers and Design Rules. 1.5 Physical Design Optimizations. 1.6 Algorithms and Complexity. 1.7 Graph Theory Terminology. 1.8 Common EDA Terminology.
2 Netlist and System Partitioning. 2.1 Introduction. 2.2 Terminology. 2.3 Optimization Goals. 2.4 Partitioning Algorithms. 2.5 A Framework for Multilevel Partitioning. 2.6 System Partitioning onto Multiple FPGAs. Chapter 2 Exercises.
3 Chip Planning. 3.1 Introduction to Floorplanning. 3.2 Optimization Goals in Floorplanning. 3.3 Terminology. 3.4 Floorplan Representations. 3.5 Floorplanning Algorithms. 3.6 Pin Assignment. 3.7 Power and Ground Routing. Chapter 3 Exercises.
4 Global and Detailed Placement. 4.1 Introduction. 4.2 Optimization Objectives. 4.3 Global Placement. 4.4 Legalization and Detailed Placement. Chapter 4 Exercises.
5 Global Routing. 5.1 Introduction. 5.2 Terminology and Definitions. 5.3 Optimization Goals. 5.4 Representations of Routing Regions. 5.5 The Global Routing Flow. 5.6 Single-Net Routing. 5.7 Full-Netlist Routing. 5.8 Modern Global Routing. Chapter 5 Exercises.
6 Detailed Routing. 6.1 Terminology. 6.2 Horizontal and Vertical Constraint Graphs. 6.3 Channel Routing Algorithms. 6.4 Switchbox Routing. 6.5 Over-the-Cell Routing Algorithms. 6.6 Modern Challenges in Detailed Routing. Chapter 6 Exercises.
7 Specialized Routing. 7.1 Introduction to Area Routing. 7.2 Net Ordering in Area Routing. 7.3 Non-Manhattan Routing. 7.4 Basic Concepts in Clock Networks. 7.5 Modern Clock Tree Synthesis. Chapter 7 Exercises.
8 Timing Closure. 8.1 Introduction. 8.2 Timing Analysis and Performance Constraints. 8.3 Timing-Driven Placement. 8.4 Timing-Driven Routing. 8.5 Physical Synthesis. 8.6 Performance-Driven Design Flow. 8.7 Conclusions. Chapter 8 Exercises.
A Solutions to Chapter Exercises. B Example CMOS Cell Layouts.
商品描述(中文翻譯)
1 引言
1.1 電子設計自動化 (EDA)
1.2 VLSI 設計流程
1.3 VLSI 設計風格
1.4 佈局層與設計規則
1.5 物理設計優化
1.6 演算法與複雜度
1.7 圖論術語
1.8 常見 EDA 術語
2 網路清單與系統分割
2.1 引言
2.2 術語
2.3 優化目標
2.4 分割演算法
2.5 多層分割框架
2.6 系統分割至多個 FPGA
第 2 章 練習
3 晶片規劃
3.1 平面規劃簡介
3.2 平面規劃中的優化目標
3.3 術語
3.4 平面表示
3.5 平面規劃演算法
3.6 引腳分配
3.7 電源與接地路由
第 3 章 練習
4 全局與詳細放置
4.1 引言
4.2 優化目標
4.3 全局放置
4.4 合法化與詳細放置
第 4 章 練習
5 全局路由
5.1 引言
5.2 術語與定義
5.3 優化目標
5.4 路由區域的表示
5.5 全局路由流程
5.6 單網路路由
5.7 完整網路清單路由
5.8 現代全局路由
第 5 章 練習
6 詳細路由
6.1 術語
6.2 水平與垂直約束圖
6.3 通道路由演算法
6.4 開關盒路由
6.5 跨單元路由演算法
6.6 詳細路由中的現代挑戰
第 6 章 練習
7 專用路由
7.1 區域路由簡介
7.2 區域路由中的網路排序
7.3 非曼哈頓路由
7.4 時鐘網路的基本概念
7.5 現代時鐘樹合成
第 7 章 練習
8 時序收斂
8.1 引言
8.2 時序分析與性能約束
8.3 時序驅動放置
8.4 時序驅動路由
8.5 物理合成
8.6 性能驅動設計流程
8.7 結論
第 8 章 練習
A 章節練習的解答
B 範例 CMOS 單元佈局
作者簡介
Andrew B. Kahng is Professor of CSE and ECE at UC San Diego, where he holds the endowed chair in High-Performance Computing. He has served as visiting scientist at Cadence (1995-1997) and as founder, chairman and CTO at Blaze DFM (2004-2006).
Jens Lienig is Professor of Electrical Engineering at TU Dresden. He is also the director of the Institute of Electromechanical and Electronic Design at TUD. He has worked as project manager at Tanner Research, Inc. (1996-1999) and Robert Bosch GmbH (1999-2002).
Igor L. Markov is a Fellow of IEEE and an ACM Distinguished Scientist. In addition to his career as a Professor of Electrical Engineering and Computer Science at the University of Michigan, he has worked at Google (2014-2017) and has been with Facebook since 2018.
Jin Hu was a PhD student at the Computer Science and Engineering (CSE) Division at the University of Michigan. Afterwards, she has been with IBM Corp. (2013-2017), Bloomberg L.P. (2017-2019) and Two Sigma Insurance Quantified (TSIQ) (since 2019).
作者簡介(中文翻譯)
安德魯·B·康(Andrew B. Kahng)是加州大學聖地牙哥分校(UC San Diego)計算機科學與工程(CSE)及電子工程(ECE)教授,並擔任高效能計算的捐贈講座教授。他曾於1995年至1997年間擔任Cadence的訪問科學家,並於2004年至2006年間擔任Blaze DFM的創始人、主席及首席技術官(CTO)。
延斯·利尼格(Jens Lienig)是德累斯頓工業大學(TU Dresden)電機工程教授。他同時也是德累斯頓工業大學電機與電子設計研究所的所長。他曾於1996年至1999年間擔任Tanner Research, Inc.的專案經理,並於1999年至2002年間在羅伯特·博世有限公司(Robert Bosch GmbH)工作。
伊戈爾·L·馬爾科夫(Igor L. Markov)是IEEE的會士及ACM的傑出科學家。除了在密西根大學(University of Michigan)擔任電機工程及計算機科學教授的職業生涯外,他曾於2014年至2017年間在Google工作,並自2018年起加入Facebook。
胡瑾(Jin Hu)曾是密西根大學計算機科學與工程(CSE)系的博士生。之後,她曾在IBM公司(2013-2017)、彭博社(Bloomberg L.P.)(2017-2019)及Two Sigma Insurance Quantified(TSIQ)(自2019年起)工作。