VLSI Architecture for Signal, Speech, and Image Processing: Advances, Challenges, and Potential

Nandan, Durgesh, Mohanty, Basant Kumar, Kumar, Sanjeev

  • 出版商: Apple Academic Press
  • 出版日期: 2022-11-03
  • 售價: $6,450
  • 貴賓價: 9.5$6,128
  • 語言: 英文
  • 頁數: 320
  • 裝訂: Hardcover - also called cloth, retail trade, or trade
  • ISBN: 1774637308
  • ISBN-13: 9781774637302
  • 相關分類: VLSI
  • 海外代購書籍(需單獨結帳)

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商品描述

This new volume introduces various VLSI (very-large-scale integration) architecture for DSP filters, speech filters, and image filters, detailing their key applications and discussing different aspects and technologies used in VLSI design, models and architectures, and more. The volume explores the major challenges with the aim to develop real-time hardware architecture designs that are compact and accurate. It provides useful research in the field of computer arithmetic and can be applied for various arithmetic circuits, for their digital implementation schemes, and for performance considerations.

作者簡介

Durgesh Nandan, PhD, is a Research Mentor and Account Manager at Accendere Knowledge Management Services Pvt. Ltd. He formerly served as Head of the Department of Electronics and Communication Engineering, IASSCOM Fortune Institutes of Technology, India. He is a session chair, technical program committee chair, reviewer, and member of more than 50 national and international conferences. He is the author or a co-author of more than 90 papers and the author/co-author of two books.

Basant Kumar Mohanty, PhD, is Professor and Associate Dean (Research) at the Mukesh Patel School of Technology, Management and Engineering at the Narsee Moonjee Institute of Management Studies, Mumbai, India. He is also an Associate Editor for the Journal of Circuits, Systems, and Signal Processing and a senior member of IEEE Circuits and System Society. He has published over 60 technical papers and conference proceedings and has collaborated on research with faculties of top technical universities.

Sanjeev Kumar, PhD, is a Research Mentor at CL Educate Ltd., India. He was formerly affiliated with TIT Group of Institutes, India, and the Oriental Group of Institutes, Bhopal, India. He was also a project fellow at the Division of MMIC in the Defence Research and Development Organisation, Delhi, India. He acts as technical program chair, reviewer, and member of more than 40 refereed national/international conferences. He is the author or a co-author of more than 65 papers in international journals and conference proceedings.

Rajeev Kumar Arya, PhD, is Assistant Professor of Electronics and Communication Engineering at the National Institute of Technology, Patna, India. He was formerly affiliated with CMR Engineering College, Hyderabad, India. He serves as a guest editor of the International Journal of Information Technology and Web Engineering and the International Journal of Computational Systems Engineering and is a reviewer for IEEE Communication Letter and other journals.