Processor Microarchitecture: An Implementation Perspective (Synthesis Lectures on Computer Architecture)
暫譯: 處理器微架構:實作視角(計算機架構綜合講座)

Antonio Gonzalez, Fernando Latorre, Grigorios Magklis

  • 出版商: Morgan & Claypool
  • 出版日期: 2011-01-03
  • 售價: $1,620
  • 貴賓價: 9.5$1,539
  • 語言: 英文
  • 頁數: 116
  • 裝訂: Paperback
  • ISBN: 1608454525
  • ISBN-13: 9781608454525
  • 海外代購書籍(需單獨結帳)

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商品描述

This lecture presents a study of the microarchitecture of contemporary microprocessors. The focus is on implementation aspects, with discussions on their implications in terms of performance, power, and cost of state-of-the-art designs. The lecture starts with an overview of the different types of microprocessors and a review of the microarchitecture of cache memories. Then, it describes the implementation of the fetch unit, where special emphasis is made on the required support for branch prediction. The next section is devoted to instruction decode with special focus on the particular support to decoding x86 instructions. The next chapter presents the allocation stage and pays special attention to the implementation of register renaming. Afterward, the issue stage is studied. Here, the logic to implement out-of-order issue for both memory and non-memory instructions is thoroughly described. The following chapter focuses on the instruction execution and describes the different functional units that can be found in contemporary microprocessors, as well as the implementation of the bypass network, which has an important impact on the performance. Finally, the lecture concludes with the commit stage, where it describes how the architectural state is updated and recovered in case of exceptions or misspeculations. This lecture is intended for an advanced course on computer architecture, suitable for graduate students or senior undergrads who want to specialize in the area of computer architecture. It is also intended for practitioners in the industry in the area of microprocessor design. The book assumes that the reader is familiar with the main concepts regarding pipelining, out-of-order execution, cache memories, and virtual memory. Table of Contents: Introduction / Caches / The Instruction Fetch Unit / Decode / Allocation / The Issue Stage / Execute / The Commit Stage / References / Author Biographies

商品描述(中文翻譯)

本講座介紹當代微處理器的微架構研究。重點在於實作方面,並討論其在性能、功耗和成本等最先進設計上的影響。講座首先概述不同類型的微處理器,並回顧快取記憶體的微架構。接著,描述取指單元的實作,特別強調對分支預測所需的支援。下一部分專注於指令解碼,特別關注對解碼 x86 指令的特定支援。接下來的章節介紹分配階段,並特別注意寄存器重命名的實作。之後,研究發行階段。在這裡,詳細描述了實現記憶體和非記憶體指令的亂序發行的邏輯。接下來的章節專注於指令執行,描述當代微處理器中可以找到的不同功能單元,以及旁路網路的實作,這對性能有重要影響。最後,講座以提交階段作結,描述在例外或錯誤預測的情況下,如何更新和恢復架構狀態。

本講座適用於高級計算機架構課程,適合希望專攻計算機架構領域的研究生或高年級本科生。它也適合微處理器設計領域的業界從業者。本書假設讀者熟悉管線化、亂序執行、快取記憶體和虛擬記憶體等主要概念。

目錄:介紹 / 快取 / 指令取指單元 / 解碼 / 分配 / 發行階段 / 執行 / 提交階段 / 參考文獻 / 作者簡介