Transactional Memory
暫譯: 事務性記憶體
Larus/Rajwar
- 出版商: Morgan & Claypool
- 出版日期: 2007-01-11
- 售價: $1,930
- 貴賓價: 9.5 折 $1,834
- 語言: 英文
- 頁數: 226
- ISBN: 159829413X
- ISBN-13: 9781598294132
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商品描述
Description
The advent of multicore processors has renewed interest in the idea of incorporating transactions into the programming model used to write parallel programs. This approach, known as transactional memory, offers an alternative, and hopefully better, way to coordinate concurrent threads. The ACI (atomicity, consistency, isolation) properties of transactions provide a foundation to ensure that concurrent reads and writes of shared data do not produce inconsistent or incorrect results. At a higher level, a computation wrapped in a transaction executes atomically – either it completes successfully and commits its result in its entirety or it aborts. In addition, isolation ensures the transaction produces the same result as if no other transactions were executing concurrently. Although transactions are not a parallel programming panacea, they shift much of the burden of synchronizing and coordinating parallel computations from a programmer to a compiler, runtime system, and hardware. The challenge for the system implementers is to build an efficient transactional memory infrastructure. This book presents an overview of the state of the art in the design and implementation of transactional memory systems, as of early summer 2006.
商品描述(中文翻譯)
**描述**
多核心處理器的出現重新引起了將交易整合進用於編寫平行程式的程式設計模型的興趣。這種方法稱為交易記憶體(transactional memory),提供了一種替代方案,並希望能更好地協調並發執行的執行緒。交易的 ACI(原子性 atomicity、一致性 consistency、隔離性 isolation)特性提供了一個基礎,以確保對共享資料的並發讀取和寫入不會產生不一致或錯誤的結果。在更高的層面上,包裹在交易中的計算以原子方式執行——要麼成功完成並完全提交其結果,要麼中止。此外,隔離性確保交易的結果與沒有其他交易同時執行的情況下產生的結果相同。雖然交易並不是平行程式設計的萬能解決方案,但它們將平行計算的同步和協調的負擔從程式設計師轉移到了編譯器、執行時系統和硬體上。系統實現者的挑戰在於建立一個高效的交易記憶體基礎設施。本書提供了截至2006年夏季初,交易記憶體系統設計和實現的最新技術概述。